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Rev Log message Author Age Path
118 Update components to be compatible with Terasic DE1 implementation dilbert57 5106d 17h /
117 Update Terasic DE1 implementation dilbert57 5106d 17h /
116 Update Terasic DE1 implementation dilbert57 5106d 18h /
115 Fold in Johns changes davidgb 5164d 07h /
114 Renamed project from my_sytem09 to system09 davidgb 5164d 08h /
113 clean cleans up more temp files davidgb 5164d 08h /
112 Branching at last known working XSA-3S1000 model. davidgb 5164d 18h /
111 Renamed project from my_system09 to system09 davidgb 5164d 19h /
110 Changes from John davidgb 5166d 07h /
109 Changes from John davidgb 5166d 07h /
108 Changes from John davidgb 5166d 07h /
107 Changes from John davidgb 5166d 07h /
106 davidgb 5171d 02h /
105 davidgb 5171d 19h /
104 davidgb 5171d 20h /
103 davidgb 5171d 20h /
102 davidgb 5171d 20h /
101 davidgb 5171d 20h /
100 Updates from John. Digilent S3STARTER and XSA-3S1000 work. davidgb 5171d 20h /
99 Updates from John. Digilent S3STARTER and XSA-3S1000 work. davidgb 5171d 20h /
98 renamed bram ports davidgb 5172d 20h /
97 renamed bram ports davidgb 5172d 20h /
96 renamed bram ports davidgb 5172d 20h /
95 renamed bram ports davidgb 5172d 20h /
94 renamed bram ports davidgb 5172d 20h /
93 Select b16 for BRAM_TYPE davidgb 5172d 22h /
92 Select b16 for BRAM_TYPE davidgb 5172d 22h /
91 Use BRAM_TYPE variable to select bram generation by s19tovhd davidgb 5172d 22h /
90 Modified to allow generation of two flavors of BRAMS:
b16 for Xilinx Spartan3
b4 for Xilinx Spartan2?
davidgb 5172d 22h /
89 whitespace davidgb 5174d 00h /

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