OpenCores
URL https://opencores.org/ocsvn/cpu_lecture/cpu_lecture/trunk

Subversion Repositories cpu_lecture

[/] [cpu_lecture] - Rev 25

Rev

Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
25 uart transmitter state handling improved jsauermann 3829d 04h /cpu_lecture
24 write updated SP in interrupt opcode jsauermann 3853d 02h /cpu_lecture
23 fixed bugs in interrupt vector jsauermann 3854d 05h /cpu_lecture
22 aligned I/O port numbers to real mega8 jsauermann 3854d 10h /cpu_lecture
21 fixed bug in Sign bit computation for SUB and CP instructions jsauermann 3856d 05h /cpu_lecture
20 readability of 95xx instructions improved jsauermann 3888d 01h /cpu_lecture
19 another bug in the decoding of two-cycle instructions fixed jsauermann 3888d 02h /cpu_lecture
18 fixed a bug that caused double execution of some 95xx instructions jsauermann 3891d 04h /cpu_lecture
17 fixed missing carry flag for ROR instruction jsauermann 3895d 02h /cpu_lecture
16 fixed missing RD_M signal for IN instruction jsauermann 3904d 03h /cpu_lecture
15 fixed SP auto inc/dec problem jsauermann 3904d 05h /cpu_lecture
14 fixed wrong Q_RSEL for LDD instruction jsauermann 3906d 02h /cpu_lecture
13 fixed fault in LDD/STD decoding jsauermann 3907d 02h /cpu_lecture
12 fixed bug in decoding of I/O address for SP jsauermann 3908d 02h /cpu_lecture
11 fixed fault is BSET/BCLR instruction jsauermann 3910d 02h /cpu_lecture
10 wait decoder fault fixed jsauermann 3910d 07h /cpu_lecture
9 renamed 'main' to 'hello' in build commands jsauermann 3911d 03h /cpu_lecture
8 picture quality slightly improved jsauermann 3911d 08h /cpu_lecture
7 support multiple port sizes in make_mem jsauermann 3911d 09h /cpu_lecture
6 support multiple port sizes in make_mem jsauermann 3911d 10h /cpu_lecture
5 support multiple port sizes in make_mem jsauermann 3911d 10h /cpu_lecture
4 initial check-in jsauermann 3915d 06h /cpu_lecture
3 initial check-in jsauermann 3915d 11h /cpu_lecture
2 initial check-in jsauermann 3916d 04h /cpu_lecture
1 The project and the structure was created root 3916d 05h /cpu_lecture

powered by: WebSVN 2.1.0

© copyright 1999-2020 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.