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Rev Log message Author Age Path
85 Log info was missing. mohor 7696d 07h /
84 LinkFail signal was not latching appropriate bit. mohor 7696d 07h /
83 MAC address recognition was not correct (bytes swaped). mohor 7696d 07h /
82 Byte ordering changed (Big Endian used). casex changed with case because
Xilinx Foundation had problems. Tested in HW. It WORKS.
mohor 7696d 09h /
81 Typos fixed, INT_SOURCE and INT_MASK registers changed. mohor 7696d 09h /
80 Small fixes for external/internal DMA missmatches. mohor 7700d 11h /
79 RetryCntLatched was unused and removed from design mohor 7700d 11h /
78 WB_SEL_I was unused and removed from design mohor 7700d 11h /
77 Interrupts changed mohor 7700d 11h /
76 Interrupts changed in the top file mohor 7700d 11h /

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