OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] - Rev 160

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
160 error acknowledge cycle termination added to display. mohor 6506d 22h /
159 Async reset for WB_ACK_O removed (when core was in reset, it was
impossible to access BDs).
RxPointers and TxPointers names changed to be more descriptive.
TxUnderRun synchronized.
mohor 6507d 18h /
158 Typo fixed. mohor 6507d 18h /
157 This testbench will soon be obsolete. Please use tb_ethernet.v mohor 6510d 00h /
156 Valid testbench. mohor 6510d 00h /
155 Minor changes. mohor 6510d 00h /
154 Design document is still under construction. mohor 6510d 23h /
153 Temp version (backup). mohor 6511d 14h /
152 Version 1.16 created. See revision history in the document for details. mohor 6511d 14h /
151 This commit was manufactured by cvs2svn to create tag 'rel_4'. 6511d 16h /
150 Debug registers reg1, 2, 3, 4 connected. Synchronization of many signals
changed (bugs fixed). Access to un-alligned buffers fixed. RxAbort signal
was not used OK.
mohor 6511d 16h /
149 Signals related to the control frames connected. Debug registers reg1, 2, 3, 4
connected.
mohor 6511d 16h /
148 Bug when last byte of destination address was not checked fixed. mohor 6511d 16h /
147 ETH_TXCTRL and ETH_RXCTRL registers added. Interrupts related to
the control frames connected.
mohor 6511d 16h /
146 CarrierSenseLost status is not set when working in loopback mode. mohor 6511d 16h /
145 Defines for control registers added (ETH_TXCTRL and ETH_RXCTRL). mohor 6511d 16h /
144 This commit was manufactured by cvs2svn to create tag
'runing_under_uclinux'.
6527d 19h /
143 Only values smaller or equal to 0x80 can be written to TX_BD_NUM register.
r_TxEn and r_RxEn depend on the limit values of the TX_BD_NUMOut.
mohor 6527d 19h /
142 This commit was manufactured by cvs2svn to create tag 'rel_3'. 6530d 12h /
141 Syntax error fixed. mohor 6530d 12h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2020 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.