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Rev Log message Author Age Path
243 Late collision is not reported any more. tadejm 6558d 04h /
242 Late collision is reported only when not in the full duplex.
Sample is taken (for status) as soon as MRxDV is not valid (regardless
of the received byte cnt).
tadejm 6558d 19h /
241 StartIdle state changed (not important the size of the packet).
StartData1 activates only while ByteCnt is smaller than the MaxFrame.
tadejm 6558d 19h /
240 All modules are reset with wb_rst instead of the r_Rst. Exception is MII module. tadejm 6558d 19h /
239 RxError is not generated when small frame reception is enabled and small
frames are received.
tadejm 6558d 19h /
238 Defines fixed to use generic RAM by default. mohor 6570d 23h /
237 This commit was manufactured by cvs2svn to create tag 'rel_9'. 6573d 04h /
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 6573d 04h /
235 rev 4. mohor 6573d 19h /
234 Figure list assed to the revision 3. mohor 6574d 03h /
233 Revision 0.3 released. Some figures added. mohor 6574d 04h /
232 fpga define added. mohor 6578d 23h /
231 Description of Core Modules added (figure). mohor 6581d 00h /
230 This commit was manufactured by cvs2svn to create tag 'rel_8'. 6584d 21h /
229 case changed to casex. mohor 6584d 21h /
228 This commit was manufactured by cvs2svn to create tag 'rel_7'. 6585d 00h /
227 Changed BIST scan signals. tadejm 6585d 00h /
226 Igor added WB burst support and repaired BUG when handling TX under-run and retry. tadejm 6585d 02h /
225 Some minor changes. tadejm 6585d 02h /
224 Signals for a wave window in Modelsim. tadejm 6585d 03h /

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