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Rev Log message Author Age Path
255 TPauseRq synchronized to tx_clk. mohor 7789d 07h /
254 Temp version. mohor 7790d 11h /
253 r_MiiMRst is not used for resetting the MIIM module. wb_rst used instead. mohor 7790d 13h /
252 Just some updates. tadejm 7790d 14h /
251 When control frame (PAUSE) was sent, status was written in the
eth_wishbone module and both TXB and TXC interrupts were set. Fixed.
Only TXC interrupt is set.
mohor 7790d 14h /
250 AddressMiss status is connecting to the Rx BD. AddressMiss is identifying
that a frame was received because of the promiscous mode.
mohor 7790d 14h /
249 This commit was manufactured by cvs2svn to create tag 'rel_11'. 7791d 14h /
248 wb_rst_i is used for MIIM reset. mohor 7791d 14h /
247 This commit was manufactured by cvs2svn to create tag 'rel_10'. 7794d 17h /
246 Since r_Rst bit is not used any more, default value is changed to 0xa000. mohor 7794d 17h /
245 Rev 1.7. mohor 7795d 11h /
244 r_Rst signal does not reset any module any more and is removed from the design. mohor 7795d 13h /
243 Late collision is not reported any more. tadejm 7795d 18h /
242 Late collision is reported only when not in the full duplex.
Sample is taken (for status) as soon as MRxDV is not valid (regardless
of the received byte cnt).
tadejm 7796d 09h /
241 StartIdle state changed (not important the size of the packet).
StartData1 activates only while ByteCnt is smaller than the MaxFrame.
tadejm 7796d 09h /
240 All modules are reset with wb_rst instead of the r_Rst. Exception is MII module. tadejm 7796d 09h /
239 RxError is not generated when small frame reception is enabled and small
frames are received.
tadejm 7796d 09h /
238 Defines fixed to use generic RAM by default. mohor 7808d 13h /
237 This commit was manufactured by cvs2svn to create tag 'rel_9'. 7810d 18h /
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 7810d 18h /

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