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Rev Log message Author Age Path
256 TxDone and TxAbort changed so they're not propagated to the wishbone
module when control frame is transmitted.
mohor 7002d 01h /
255 TPauseRq synchronized to tx_clk. mohor 7002d 01h /
254 Temp version. mohor 7003d 05h /
253 r_MiiMRst is not used for resetting the MIIM module. wb_rst used instead. mohor 7003d 07h /
252 Just some updates. tadejm 7003d 07h /
251 When control frame (PAUSE) was sent, status was written in the
eth_wishbone module and both TXB and TXC interrupts were set. Fixed.
Only TXC interrupt is set.
mohor 7003d 07h /
250 AddressMiss status is connecting to the Rx BD. AddressMiss is identifying
that a frame was received because of the promiscous mode.
mohor 7003d 08h /
249 This commit was manufactured by cvs2svn to create tag 'rel_11'. 7004d 08h /
248 wb_rst_i is used for MIIM reset. mohor 7004d 08h /
247 This commit was manufactured by cvs2svn to create tag 'rel_10'. 7007d 11h /
246 Since r_Rst bit is not used any more, default value is changed to 0xa000. mohor 7007d 11h /
245 Rev 1.7. mohor 7008d 04h /
244 r_Rst signal does not reset any module any more and is removed from the design. mohor 7008d 06h /
243 Late collision is not reported any more. tadejm 7008d 12h /
242 Late collision is reported only when not in the full duplex.
Sample is taken (for status) as soon as MRxDV is not valid (regardless
of the received byte cnt).
tadejm 7009d 03h /
241 StartIdle state changed (not important the size of the packet).
StartData1 activates only while ByteCnt is smaller than the MaxFrame.
tadejm 7009d 03h /
240 All modules are reset with wb_rst instead of the r_Rst. Exception is MII module. tadejm 7009d 03h /
239 RxError is not generated when small frame reception is enabled and small
frames are received.
tadejm 7009d 03h /
238 Defines fixed to use generic RAM by default. mohor 7021d 07h /
237 This commit was manufactured by cvs2svn to create tag 'rel_9'. 7023d 12h /
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 7023d 12h /
235 rev 4. mohor 7024d 03h /
234 Figure list assed to the revision 3. mohor 7024d 11h /
233 Revision 0.3 released. Some figures added. mohor 7024d 11h /
232 fpga define added. mohor 7029d 06h /
231 Description of Core Modules added (figure). mohor 7031d 08h /
230 This commit was manufactured by cvs2svn to create tag 'rel_8'. 7035d 04h /
229 case changed to casex. mohor 7035d 04h /
228 This commit was manufactured by cvs2svn to create tag 'rel_7'. 7035d 08h /
227 Changed BIST scan signals. tadejm 7035d 08h /

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