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Rev Log message Author Age Path
256 TxDone and TxAbort changed so they're not propagated to the wishbone
module when control frame is transmitted.
mohor 6394d 22h /
255 TPauseRq synchronized to tx_clk. mohor 6394d 22h /
254 Temp version. mohor 6396d 02h /
253 r_MiiMRst is not used for resetting the MIIM module. wb_rst used instead. mohor 6396d 04h /
252 Just some updates. tadejm 6396d 05h /
251 When control frame (PAUSE) was sent, status was written in the
eth_wishbone module and both TXB and TXC interrupts were set. Fixed.
Only TXC interrupt is set.
mohor 6396d 05h /
250 AddressMiss status is connecting to the Rx BD. AddressMiss is identifying
that a frame was received because of the promiscous mode.
mohor 6396d 05h /
249 This commit was manufactured by cvs2svn to create tag 'rel_11'. 6397d 05h /
248 wb_rst_i is used for MIIM reset. mohor 6397d 05h /
247 This commit was manufactured by cvs2svn to create tag 'rel_10'. 6400d 08h /
246 Since r_Rst bit is not used any more, default value is changed to 0xa000. mohor 6400d 08h /
245 Rev 1.7. mohor 6401d 02h /
244 r_Rst signal does not reset any module any more and is removed from the design. mohor 6401d 04h /
243 Late collision is not reported any more. tadejm 6401d 09h /
242 Late collision is reported only when not in the full duplex.
Sample is taken (for status) as soon as MRxDV is not valid (regardless
of the received byte cnt).
tadejm 6402d 00h /
241 StartIdle state changed (not important the size of the packet).
StartData1 activates only while ByteCnt is smaller than the MaxFrame.
tadejm 6402d 00h /
240 All modules are reset with wb_rst instead of the r_Rst. Exception is MII module. tadejm 6402d 00h /
239 RxError is not generated when small frame reception is enabled and small
frames are received.
tadejm 6402d 00h /
238 Defines fixed to use generic RAM by default. mohor 6414d 04h /
237 This commit was manufactured by cvs2svn to create tag 'rel_9'. 6416d 09h /

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