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Rev Log message Author Age Path
251 When control frame (PAUSE) was sent, status was written in the
eth_wishbone module and both TXB and TXC interrupts were set. Fixed.
Only TXC interrupt is set.
mohor 7994d 23h /
250 AddressMiss status is connecting to the Rx BD. AddressMiss is identifying
that a frame was received because of the promiscous mode.
mohor 7994d 23h /
249 This commit was manufactured by cvs2svn to create tag 'rel_11'. 7995d 23h /
248 wb_rst_i is used for MIIM reset. mohor 7995d 23h /
247 This commit was manufactured by cvs2svn to create tag 'rel_10'. 7999d 02h /
246 Since r_Rst bit is not used any more, default value is changed to 0xa000. mohor 7999d 02h /
245 Rev 1.7. mohor 7999d 20h /
244 r_Rst signal does not reset any module any more and is removed from the design. mohor 7999d 22h /
243 Late collision is not reported any more. tadejm 8000d 03h /
242 Late collision is reported only when not in the full duplex.
Sample is taken (for status) as soon as MRxDV is not valid (regardless
of the received byte cnt).
tadejm 8000d 18h /

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