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307 This commit was manufactured by cvs2svn to create tag 'rel_24'. 7442d 00h /
306 Lapsus fixed (!we -> ~we). simons 7442d 00h /
305 This commit was manufactured by cvs2svn to create tag 'rel_23'. 7463d 20h /
304 WISHBONE slave changed and tested from only 32-bit accesss to byte access. tadejm 7463d 20h /
303 This commit was manufactured by cvs2svn to create tag 'rel_22'. 7490d 07h /
302 mbist signals updated according to newest convention markom 7490d 07h /
301 Update RxEnSync only when mrxdv_pad_i is inactive (LOW). knguyen 7500d 23h /
300 This commit was manufactured by cvs2svn to create tag 'rel_21'. 7548d 03h /
299 Artisan RAMs added. mohor 7548d 03h /
298 This commit was manufactured by cvs2svn to create tag 'rel_20'. 7553d 22h /
297 Artisan ram instance added. simons 7553d 22h /
296 This commit was manufactured by cvs2svn to create tag 'rel_19'. 7555d 01h /
295 Few minor changes. tadejm 7555d 01h /
294 Added path to a file with distributed RAM instances for xilinx. tadejm 7557d 02h /
293 initial. tadejm 7580d 23h /
292 Corrected mistake. tadejm 7580d 23h /
291 initial tadejm 7581d 00h /
290 Additional checking for FAILED tests added - for ATS. tadejm 7581d 01h /
289 This commit was manufactured by cvs2svn to create tag 'rel_18'. 7590d 00h /
288 This file was not part of the RTL before, but it should be here. simons 7590d 00h /

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