OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] - Rev 339

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
339 Added basic support for Icarus Verilog olof 3438d 16h /
338 root 4230d 22h /
337 root 4287d 00h /
336 Added old uploaded documents to new repository. root 4288d 03h /
335 New directory structure. root 4288d 03h /
334 Minor fixes for Icarus simulator. igorm 5736d 05h /
333 Some small fixes + some troubles fixed. igorm 5736d 17h /
332 Case statement improved for synthesys. igorm 5749d 22h /
331 Tests for delayed CRC and defer indication added. igorm 5765d 00h /
330 Warning fixes. igorm 5765d 00h /
329 Defer indication fixed. igorm 5765d 02h /
328 Delayed CRC fixed. igorm 5765d 02h /
327 Defer indication fixed. igorm 5765d 02h /
326 Delayed CRC fixed. igorm 5765d 02h /
325 Defer indication fixed. igorm 5765d 02h /
324 This commit was manufactured by cvs2svn to create tag 'rel_27'. 6062d 03h /
323 Accidently deleted line put back. igorm 6062d 03h /
322 This commit was manufactured by cvs2svn to create tag 'rel_26'. 6065d 22h /
321 - Bug connected to the TX_BD_NUM_Wr signal fixed (bug came in with the
previous update of the core.
- TxBDAddress is set to 0 after the TX is enabled in the MODER register.
- RxBDAddress is set to r_TxBDNum<<1 after the RX is enabled in the MODER
register. (thanks to Mathias and Torbjorn)
- Multicast reception was fixed. Thanks to Ulrich Gries
igorm 6065d 22h /
320 TX_BD_NUM_Wr error fixed. Error was entered with the last check-in. igorm 6066d 01h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2020 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.