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Rev Log message Author Age Path
339 Added basic support for Icarus Verilog olof 3629d 10h /
338 root 4421d 16h /
337 root 4477d 18h /
336 Added old uploaded documents to new repository. root 4478d 21h /
335 New directory structure. root 4478d 21h /
334 Minor fixes for Icarus simulator. igorm 5926d 23h /
333 Some small fixes + some troubles fixed. igorm 5927d 11h /
332 Case statement improved for synthesys. igorm 5940d 16h /
331 Tests for delayed CRC and defer indication added. igorm 5955d 18h /
330 Warning fixes. igorm 5955d 18h /
329 Defer indication fixed. igorm 5955d 19h /
328 Delayed CRC fixed. igorm 5955d 19h /
327 Defer indication fixed. igorm 5955d 20h /
326 Delayed CRC fixed. igorm 5955d 20h /
325 Defer indication fixed. igorm 5955d 20h /
324 This commit was manufactured by cvs2svn to create tag 'rel_27'. 6252d 20h /
323 Accidently deleted line put back. igorm 6252d 20h /
322 This commit was manufactured by cvs2svn to create tag 'rel_26'. 6256d 15h /
321 - Bug connected to the TX_BD_NUM_Wr signal fixed (bug came in with the
previous update of the core.
- TxBDAddress is set to 0 after the TX is enabled in the MODER register.
- RxBDAddress is set to r_TxBDNum<<1 after the RX is enabled in the MODER
register. (thanks to Mathias and Torbjorn)
- Multicast reception was fixed. Thanks to Ulrich Gries
igorm 6256d 15h /
320 TX_BD_NUM_Wr error fixed. Error was entered with the last check-in. igorm 6256d 19h /

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