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Rev	Log message	Author	Age	Path
341	Reset AdressMiss signal on new frames to prevent reporting the old status if new frame is short	olof	4668d 23h	/
340	Don't fail if log dir already exists	olof	4669d 21h	/
339	Added basic support for Icarus Verilog	olof	4670d 20h	/
338		root	5463d 02h	/
337		root	5519d 04h	/
336	Added old uploaded documents to new repository.	root	5520d 07h	/
335	New directory structure.	root	5520d 07h	/
334	Minor fixes for Icarus simulator.	igorm	6968d 09h	/
333	Some small fixes + some troubles fixed.	igorm	6968d 21h	/
332	Case statement improved for synthesys.	igorm	6982d 02h	/
331	Tests for delayed CRC and defer indication added.	igorm	6997d 04h	/
330	Warning fixes.	igorm	6997d 04h	/
329	Defer indication fixed.	igorm	6997d 05h	/
328	Delayed CRC fixed.	igorm	6997d 06h	/
327	Defer indication fixed.	igorm	6997d 06h	/
326	Delayed CRC fixed.	igorm	6997d 06h	/
325	Defer indication fixed.	igorm	6997d 06h	/
324	This commit was manufactured by cvs2svn to create tag 'rel_27'.		7294d 06h	/
323	Accidently deleted line put back.	igorm	7294d 06h	/
322	This commit was manufactured by cvs2svn to create tag 'rel_26'.		7298d 02h	/
321	- Bug connected to the TX_BD_NUM_Wr signal fixed (bug came in with the previous update of the core. - TxBDAddress is set to 0 after the TX is enabled in the MODER register. - RxBDAddress is set to r_TxBDNum<<1 after the RX is enabled in the MODER register. (thanks to Mathias and Torbjorn) - Multicast reception was fixed. Thanks to Ulrich Gries	igorm	7298d 02h	/
320	TX_BD_NUM_Wr error fixed. Error was entered with the last check-in.	igorm	7298d 05h	/
319	Latest Ethernet IP core testbench.	tadejm	7329d 01h	/
318	Latest Ethernet IP core testbench.	tadejm	7329d 01h	/
317	Multicast detection fixed. Only the LSB of the first byte is checked.	igorm	7338d 07h	/
316	This commit was manufactured by cvs2svn to create tag 'rel_25'.		7441d 04h	/
315	Updated testbench. Some more testcases, some repaired.	tadejm	7441d 04h	/
314	This commit was manufactured by cvs2svn to create tag 'asyst_3'.		7441d 04h	/
313	This commit was manufactured by cvs2svn to create tag 'asyst_2'.		7441d 04h	/
312	Corrected address mismatch for xilinx RAMB4_S8 model which has wider address than RAMB4_S16.	tadejm	7441d 04h	/

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[/] - Rev 341

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