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Rev Log message Author Age Path
83 MAC address recognition was not correct (bytes swaped). mohor 7694d 18h /
82 Byte ordering changed (Big Endian used). casex changed with case because
Xilinx Foundation had problems. Tested in HW. It WORKS.
mohor 7694d 20h /
81 Typos fixed, INT_SOURCE and INT_MASK registers changed. mohor 7694d 21h /
80 Small fixes for external/internal DMA missmatches. mohor 7698d 23h /
79 RetryCntLatched was unused and removed from design mohor 7698d 23h /
78 WB_SEL_I was unused and removed from design mohor 7698d 23h /
77 Interrupts changed mohor 7698d 23h /
76 Interrupts changed in the top file mohor 7698d 23h /
75 r_Bro is used for accepting/denying frames mohor 7698d 23h /
74 Reset values are passed to registers through parameters mohor 7698d 23h /
73 Number of interrupts changed mohor 7698d 23h /
72 Retry is not activated when a Tx Underrun occured mohor 7703d 03h /
71 Address recognition system added. Buffer Descriptors changed. DMA section
changed. Ports changed.
mohor 7707d 04h /
70 Small fixes. mohor 7707d 05h /
69 Define missmatch fixed. mohor 7708d 02h /
68 Registered trimmed. Unused registers removed. mohor 7709d 01h /
67 EXTERNAL_DMA used instead of WISHBONE_DMA. mohor 7709d 02h /
66 Testbench fixed, code simplified, unused signals removed. mohor 7709d 08h /
65 Testbench fixed, code simplified, unused signals removed. mohor 7709d 08h /
64 Status was not written correctly when frames were discarted because of
address mismatch.
mohor 7709d 22h /

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