OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [branches/] [unneback/] [bench/] [verilog/] - Rev 363

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
361 created branch unneback unneback 4615d 00h /ethmac/branches/unneback/bench/verilog/
348 Added option to dump VCD files olof 4636d 16h /ethmac/branches/unneback/bench/verilog/
346 Updated project location olof 4636d 19h /ethmac/branches/unneback/bench/verilog/
345 Temporarily disable failing tests olof 4636d 20h /ethmac/branches/unneback/bench/verilog/
344 bit 9 in phy control register is self clearing olof 4642d 22h /ethmac/branches/unneback/bench/verilog/
343 Address miss should not be asserted on short frames olof 4646d 18h /ethmac/branches/unneback/bench/verilog/
342 Added cast to avoid inequality when comparing different data types olof 4646d 18h /ethmac/branches/unneback/bench/verilog/
338 root 5440d 21h /ethmac/branches/unneback/bench/verilog/
335 New directory structure. root 5498d 02h /ethmac/branches/unneback/bench/verilog/
334 Minor fixes for Icarus simulator. igorm 6946d 04h /ethmac/branches/unneback/bench/verilog/
331 Tests for delayed CRC and defer indication added. igorm 6974d 23h /ethmac/branches/unneback/bench/verilog/
318 Latest Ethernet IP core testbench. tadejm 7306d 20h /ethmac/branches/unneback/bench/verilog/
315 Updated testbench. Some more testcases, some repaired. tadejm 7418d 23h /ethmac/branches/unneback/bench/verilog/
302 mbist signals updated according to newest convention markom 7468d 04h /ethmac/branches/unneback/bench/verilog/
299 Artisan RAMs added. mohor 7526d 00h /ethmac/branches/unneback/bench/verilog/
286 Define file in eth_cop.v is changed to eth_defines.v. Some defines were
moved from tb_eth_defines.v to eth_defines.v.
mohor 7594d 00h /ethmac/branches/unneback/bench/verilog/
281 Tests test_mac_full_duplex_receive 4-7 fixed to proper BD. mohor 7726d 20h /ethmac/branches/unneback/bench/verilog/
279 Underrun test fixed. Many other tests fixed. mohor 7727d 23h /ethmac/branches/unneback/bench/verilog/
274 Backup version. Not fully working. tadejm 7735d 17h /ethmac/branches/unneback/bench/verilog/
267 Full duplex control frames tested. mohor 7791d 20h /ethmac/branches/unneback/bench/verilog/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.