URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

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[/] [ethmac/] [branches/] [unneback/] [rtl/] [verilog/] [timescale.v] - Rev 361

Rev	Log message	Author	Age	Path
361	created branch unneback	unneback	4641d 05h	/ethmac/branches/unneback/rtl/verilog/timescale.v
346	Updated project location	olof	4663d 00h	/ethmac/branches/unneback/rtl/verilog/timescale.v
338		root	5467d 02h	/ethmac/branches/unneback/rtl/verilog/timescale.v
335	New directory structure.	root	5524d 07h	/ethmac/branches/unneback/rtl/verilog/timescale.v
37	Link in the header changed.	mohor	8126d 07h	/ethmac/branches/unneback/rtl/verilog/timescale.v
24	Log file added.	mohor	8222d 06h	/ethmac/branches/unneback/rtl/verilog/timescale.v
22	eth_timescale.v changed to timescale.v This is done because of the simulation of the few cores in a one joined project.	mohor	8222d 08h	/ethmac/branches/unneback/rtl/verilog/timescale.v