OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [asyst_2/] - Rev 199

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
199 Datasheet name changed to lower case name. mohor 7881d 00h /ethmac/tags/asyst_2/
198 Removed file. File with name in lower case will be added instead. mohor 7881d 00h /ethmac/tags/asyst_2/
197 Ethernet Data Sheet. mohor 7881d 00h /ethmac/tags/asyst_2/
196 Ethernet product brief. mohor 7881d 01h /ethmac/tags/asyst_2/
195 Product brief removed because it is the same as Datasheet. mohor 7881d 02h /ethmac/tags/asyst_2/
194 Full duplex tests modified and testbench bug repaired. tadej 7881d 02h /ethmac/tags/asyst_2/
193 Temp version (backup). mohor 7881d 04h /ethmac/tags/asyst_2/
192 Some additional reports added tadej 7882d 23h /ethmac/tags/asyst_2/
191 Bug repaired in eth_phy device tadej 7882d 23h /ethmac/tags/asyst_2/
190 Several information added to the file. mohor 7883d 00h /ethmac/tags/asyst_2/
189 Simple testbench that includes eth_cop, eth_host and eth_memory modules.
This testbench is used for testing the whole environment. Use tb_ethernet
testbench for testing just the ethernet MAC core (many tests).
mohor 7883d 00h /ethmac/tags/asyst_2/
188 PHY changed. tadej 7883d 20h /ethmac/tags/asyst_2/
187 _info file added. mohor 7883d 21h /ethmac/tags/asyst_2/
186 Macro for testbench (DO file). mohor 7883d 21h /ethmac/tags/asyst_2/
185 Directory keeper. mohor 7883d 22h /ethmac/tags/asyst_2/
184 Modelsim simulation environment should be ready now. mohor 7883d 22h /ethmac/tags/asyst_2/
183 Modelsim environment added. mohor 7883d 22h /ethmac/tags/asyst_2/
182 Full duplex test improved. tadej 7884d 23h /ethmac/tags/asyst_2/
181 MIIM test look better. mohor 7885d 01h /ethmac/tags/asyst_2/
180 Bench outputs data to display every 128 bytes. mohor 7887d 21h /ethmac/tags/asyst_2/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.