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[/] [ethmac/] [tags/] [asyst_2/] - Rev 236

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236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 6842d 23h /ethmac/tags/asyst_2/
235 rev 4. mohor 6843d 13h /ethmac/tags/asyst_2/
234 Figure list assed to the revision 3. mohor 6843d 21h /ethmac/tags/asyst_2/
233 Revision 0.3 released. Some figures added. mohor 6843d 22h /ethmac/tags/asyst_2/
232 fpga define added. mohor 6848d 17h /ethmac/tags/asyst_2/
231 Description of Core Modules added (figure). mohor 6850d 18h /ethmac/tags/asyst_2/
229 case changed to casex. mohor 6854d 15h /ethmac/tags/asyst_2/
227 Changed BIST scan signals. tadejm 6854d 18h /ethmac/tags/asyst_2/
226 Igor added WB burst support and repaired BUG when handling TX under-run and retry. tadejm 6854d 20h /ethmac/tags/asyst_2/
225 Some minor changes. tadejm 6854d 20h /ethmac/tags/asyst_2/
224 Signals for a wave window in Modelsim. tadejm 6854d 21h /ethmac/tags/asyst_2/
223 Some code changed due to bug fixes. tadejm 6854d 22h /ethmac/tags/asyst_2/
221 TxStatus is written after last access to the TX fifo is finished (in case of abort
or retry). TxDone is fixed.
mohor 6858d 19h /ethmac/tags/asyst_2/
219 txfifo_cnt and rxfifo_cnt counters width is defined in the eth_define.v file,
TxDone and TxRetry are generated after the current WISHBONE access is
finished.
mohor 6861d 20h /ethmac/tags/asyst_2/
218 Typo error fixed. (When using Bist) mohor 6861d 22h /ethmac/tags/asyst_2/
217 Bist supported. mohor 6861d 22h /ethmac/tags/asyst_2/
216 Bist signals added. mohor 6861d 22h /ethmac/tags/asyst_2/
215 Bist supported. mohor 6861d 23h /ethmac/tags/asyst_2/
214 Signals for WISHBONE B3 compliant interface added. mohor 6862d 19h /ethmac/tags/asyst_2/
213 Defines changed to have ETH_ prolog.
ETH_WISHBONE_B# define added.
mohor 6862d 19h /ethmac/tags/asyst_2/
212 Minor $display change. mohor 6862d 19h /ethmac/tags/asyst_2/
211 Bist added. mohor 6862d 19h /ethmac/tags/asyst_2/
210 BIST added. mohor 6862d 19h /ethmac/tags/asyst_2/
209 Just back-up; not completed testbench and some testcases are not
wotking properly yet.
tadejm 6863d 22h /ethmac/tags/asyst_2/
208 Virtual Silicon RAMs moved to lib directory tadej 6879d 16h /ethmac/tags/asyst_2/
207 Virtual Silicon RAM support fixed tadej 6879d 16h /ethmac/tags/asyst_2/
206 Virtual Silicon RAM added to the simulation. mohor 6879d 16h /ethmac/tags/asyst_2/
205 ETH_VIRTUAL_SILICON_RAM supported. mohor 6879d 17h /ethmac/tags/asyst_2/
204 ETH_VIRTUAL_SILICON_RAM supported (for ASIC implementation). mohor 6879d 17h /ethmac/tags/asyst_2/
203 Virtual Silicon RAM might be used in the ASIC implementation of the ethernet
core.
mohor 6879d 17h /ethmac/tags/asyst_2/

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