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[/] [ethmac/] [tags/] [asyst_2/] - Rev 236

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236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 7846d 13h /ethmac/tags/asyst_2
235 rev 4. mohor 7847d 04h /ethmac/tags/asyst_2
234 Figure list assed to the revision 3. mohor 7847d 12h /ethmac/tags/asyst_2
233 Revision 0.3 released. Some figures added. mohor 7847d 12h /ethmac/tags/asyst_2
232 fpga define added. mohor 7852d 07h /ethmac/tags/asyst_2
231 Description of Core Modules added (figure). mohor 7854d 08h /ethmac/tags/asyst_2
229 case changed to casex. mohor 7858d 05h /ethmac/tags/asyst_2
227 Changed BIST scan signals. tadejm 7858d 09h /ethmac/tags/asyst_2
226 Igor added WB burst support and repaired BUG when handling TX under-run and retry. tadejm 7858d 10h /ethmac/tags/asyst_2
225 Some minor changes. tadejm 7858d 10h /ethmac/tags/asyst_2
224 Signals for a wave window in Modelsim. tadejm 7858d 12h /ethmac/tags/asyst_2
223 Some code changed due to bug fixes. tadejm 7858d 12h /ethmac/tags/asyst_2
221 TxStatus is written after last access to the TX fifo is finished (in case of abort
or retry). TxDone is fixed.		 mohor 7862d 10h /ethmac/tags/asyst_2
219 txfifo_cnt and rxfifo_cnt counters width is defined in the eth_define.v file,
TxDone and TxRetry are generated after the current WISHBONE access is
finished.		 mohor 7865d 10h /ethmac/tags/asyst_2
218 Typo error fixed. (When using Bist) mohor 7865d 12h /ethmac/tags/asyst_2
217 Bist supported. mohor 7865d 12h /ethmac/tags/asyst_2
216 Bist signals added. mohor 7865d 12h /ethmac/tags/asyst_2
215 Bist supported. mohor 7865d 13h /ethmac/tags/asyst_2
214 Signals for WISHBONE B3 compliant interface added. mohor 7866d 09h /ethmac/tags/asyst_2
213 Defines changed to have ETH_ prolog.
ETH_WISHBONE_B# define added.		 mohor 7866d 09h /ethmac/tags/asyst_2

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