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[/] [ethmac/] [tags/] [asyst_2/] [rtl/] [verilog/] - Rev 338


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Rev Log message Author Age Path
338 root 4844d 13h /ethmac/tags/asyst_2/rtl/verilog/
335 New directory structure. root 4901d 18h /ethmac/tags/asyst_2/rtl/verilog/
313 This commit was manufactured by cvs2svn to create tag 'asyst_2'. 6822d 16h /ethmac/tags/asyst_2/rtl/verilog/
312 Corrected address mismatch for xilinx RAMB4_S8 model which has wider address than RAMB4_S16. tadejm 6822d 16h /ethmac/tags/asyst_2/rtl/verilog/
306 Lapsus fixed (!we -> ~we). simons 6823d 13h /ethmac/tags/asyst_2/rtl/verilog/
304 WISHBONE slave changed and tested from only 32-bit accesss to byte access. tadejm 6845d 10h /ethmac/tags/asyst_2/rtl/verilog/
302 mbist signals updated according to newest convention markom 6871d 21h /ethmac/tags/asyst_2/rtl/verilog/
301 Update RxEnSync only when mrxdv_pad_i is inactive (LOW). knguyen 6882d 13h /ethmac/tags/asyst_2/rtl/verilog/
297 Artisan ram instance added. simons 6935d 12h /ethmac/tags/asyst_2/rtl/verilog/
288 This file was not part of the RTL before, but it should be here. simons 6971d 14h /ethmac/tags/asyst_2/rtl/verilog/
286 Define file in eth_cop.v is changed to eth_defines.v. Some defines were
moved from tb_eth_defines.v to eth_defines.v.
mohor 6997d 17h /ethmac/tags/asyst_2/rtl/verilog/
285 Binary operator used instead of unary (xnor). mohor 6997d 17h /ethmac/tags/asyst_2/rtl/verilog/
284 Busy was set 2 cycles too late. Reported by Dennis Scott. mohor 7025d 18h /ethmac/tags/asyst_2/rtl/verilog/
283 RxBDAddress was updated also when value to r_TxBDNum was written with
greater value than allowed.
mohor 7053d 12h /ethmac/tags/asyst_2/rtl/verilog/
280 Reset has priority in some flipflops. mohor 7131d 14h /ethmac/tags/asyst_2/rtl/verilog/
278 A new bug (entered with previous update) fixed. When abort occured sometimes
data transmission was blocked.
mohor 7131d 15h /ethmac/tags/asyst_2/rtl/verilog/
277 When padding was enabled and crc disabled, frame was not ended correctly. mohor 7131d 15h /ethmac/tags/asyst_2/rtl/verilog/
276 Defer indication changed. tadejm 7131d 15h /ethmac/tags/asyst_2/rtl/verilog/
275 Fix MTxErr or prevent sending too big frames. mohor 7138d 19h /ethmac/tags/asyst_2/rtl/verilog/
272 When control packets were received, they were ignored in some cases. tadejm 7139d 15h /ethmac/tags/asyst_2/rtl/verilog/

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