OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [asyst_3/] [rtl/] [verilog/] - Rev 338

Rev

Filtering Options

Clear current filter

Rev Log message Author Age Path
338 root 5441d 17h /ethmac/tags/asyst_3/rtl/verilog/
335 New directory structure. root 5498d 23h /ethmac/tags/asyst_3/rtl/verilog/
314 This commit was manufactured by cvs2svn to create tag 'asyst_3'. 7419d 20h /ethmac/tags/asyst_3/rtl/verilog/
312 Corrected address mismatch for xilinx RAMB4_S8 model which has wider address than RAMB4_S16. tadejm 7419d 20h /ethmac/tags/asyst_3/rtl/verilog/
306 Lapsus fixed (!we -> ~we). simons 7420d 18h /ethmac/tags/asyst_3/rtl/verilog/
304 WISHBONE slave changed and tested from only 32-bit accesss to byte access. tadejm 7442d 14h /ethmac/tags/asyst_3/rtl/verilog/
302 mbist signals updated according to newest convention markom 7469d 01h /ethmac/tags/asyst_3/rtl/verilog/
301 Update RxEnSync only when mrxdv_pad_i is inactive (LOW). knguyen 7479d 17h /ethmac/tags/asyst_3/rtl/verilog/
297 Artisan ram instance added. simons 7532d 16h /ethmac/tags/asyst_3/rtl/verilog/
288 This file was not part of the RTL before, but it should be here. simons 7568d 18h /ethmac/tags/asyst_3/rtl/verilog/
286 Define file in eth_cop.v is changed to eth_defines.v. Some defines were
moved from tb_eth_defines.v to eth_defines.v.
mohor 7594d 21h /ethmac/tags/asyst_3/rtl/verilog/
285 Binary operator used instead of unary (xnor). mohor 7594d 21h /ethmac/tags/asyst_3/rtl/verilog/
284 Busy was set 2 cycles too late. Reported by Dennis Scott. mohor 7622d 22h /ethmac/tags/asyst_3/rtl/verilog/
283 RxBDAddress was updated also when value to r_TxBDNum was written with
greater value than allowed.
mohor 7650d 16h /ethmac/tags/asyst_3/rtl/verilog/
280 Reset has priority in some flipflops. mohor 7728d 18h /ethmac/tags/asyst_3/rtl/verilog/
278 A new bug (entered with previous update) fixed. When abort occured sometimes
data transmission was blocked.
mohor 7728d 19h /ethmac/tags/asyst_3/rtl/verilog/
277 When padding was enabled and crc disabled, frame was not ended correctly. mohor 7728d 19h /ethmac/tags/asyst_3/rtl/verilog/
276 Defer indication changed. tadejm 7728d 19h /ethmac/tags/asyst_3/rtl/verilog/
275 Fix MTxErr or prevent sending too big frames. mohor 7735d 23h /ethmac/tags/asyst_3/rtl/verilog/
272 When control packets were received, they were ignored in some cases. tadejm 7736d 19h /ethmac/tags/asyst_3/rtl/verilog/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.