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Rev Log message Author Age Path
100 Generic ram or Xilinx ram can be used in fifo (selectable by setting
ETH_FIFO_XILINX in eth_defines.v).
mohor 8031d 12h /ethmac/tags/rel_1/
99 Document revised. mohor 8038d 11h /ethmac/tags/rel_1/
98 Document revised. mohor 8038d 11h /ethmac/tags/rel_1/
97 Small typo fixed. lampret 8055d 09h /ethmac/tags/rel_1/
96 Any address can be used for Tx and Rx BD pointers. Address does not need
to be aligned.
mohor 8059d 09h /ethmac/tags/rel_1/
95 md_padoen_o changed to md_padoe_o. Signal was always active high, just
name was incorrect.
mohor 8059d 12h /ethmac/tags/rel_1/
94 When clear and read/write are active at the same time, cnt and pointers are
set to 1.
mohor 8059d 12h /ethmac/tags/rel_1/
93 When in promiscous mode some frames were not received correctly. Fixed. mohor 8064d 10h /ethmac/tags/rel_1/
92 Some defines that are used in testbench only were moved to tb_eth_defines.v
file.
mohor 8065d 13h /ethmac/tags/rel_1/
91 Comments in Slovene language removed. mohor 8065d 13h /ethmac/tags/rel_1/
90 casex changed with case, fifo reset changed. mohor 8065d 13h /ethmac/tags/rel_1/
89 TX_BD_NUM, MAC_ADDR0 and MAC_ADDR1 register description
changed.
mohor 8069d 11h /ethmac/tags/rel_1/
88 rx_fifo was not always cleared ok. Fixed. mohor 8075d 09h /ethmac/tags/rel_1/
87 Status was not latched correctly sometimes. Fixed. mohor 8075d 12h /ethmac/tags/rel_1/
86 Big Endian problem when sending frames fixed. mohor 8076d 19h /ethmac/tags/rel_1/
85 Log info was missing. mohor 8082d 04h /ethmac/tags/rel_1/
84 LinkFail signal was not latching appropriate bit. mohor 8082d 04h /ethmac/tags/rel_1/
83 MAC address recognition was not correct (bytes swaped). mohor 8082d 05h /ethmac/tags/rel_1/
82 Byte ordering changed (Big Endian used). casex changed with case because
Xilinx Foundation had problems. Tested in HW. It WORKS.
mohor 8082d 06h /ethmac/tags/rel_1/
81 Typos fixed, INT_SOURCE and INT_MASK registers changed. mohor 8082d 07h /ethmac/tags/rel_1/
80 Small fixes for external/internal DMA missmatches. mohor 8086d 09h /ethmac/tags/rel_1/
79 RetryCntLatched was unused and removed from design mohor 8086d 09h /ethmac/tags/rel_1/
78 WB_SEL_I was unused and removed from design mohor 8086d 09h /ethmac/tags/rel_1/
77 Interrupts changed mohor 8086d 09h /ethmac/tags/rel_1/
76 Interrupts changed in the top file mohor 8086d 09h /ethmac/tags/rel_1/
75 r_Bro is used for accepting/denying frames mohor 8086d 09h /ethmac/tags/rel_1/
74 Reset values are passed to registers through parameters mohor 8086d 09h /ethmac/tags/rel_1/
73 Number of interrupts changed mohor 8086d 09h /ethmac/tags/rel_1/
72 Retry is not activated when a Tx Underrun occured mohor 8090d 13h /ethmac/tags/rel_1/
71 Address recognition system added. Buffer Descriptors changed. DMA section
changed. Ports changed.
mohor 8094d 14h /ethmac/tags/rel_1/

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