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Rev Log message Author Age Path
104 FCS should not be included in NibbleMinFl. mohor 7472d 16h /ethmac/tags/rel_1/
103 Wishbone signals are registered when ETH_REGISTERED_OUTPUTS is
selected in eth_defines.v
mohor 7472d 16h /ethmac/tags/rel_1/
102 Interrupts are visible in the ETH_INT_SOURCE regardless if they are enabled
or not.
mohor 7472d 17h /ethmac/tags/rel_1/
101 Short frame and ReceivedLengthOK were not detected correctly. mohor 7472d 17h /ethmac/tags/rel_1/
100 Generic ram or Xilinx ram can be used in fifo (selectable by setting
ETH_FIFO_XILINX in eth_defines.v).
mohor 7472d 17h /ethmac/tags/rel_1/
99 Document revised. mohor 7479d 16h /ethmac/tags/rel_1/
98 Document revised. mohor 7479d 16h /ethmac/tags/rel_1/
97 Small typo fixed. lampret 7496d 14h /ethmac/tags/rel_1/
96 Any address can be used for Tx and Rx BD pointers. Address does not need
to be aligned.
mohor 7500d 14h /ethmac/tags/rel_1/
95 md_padoen_o changed to md_padoe_o. Signal was always active high, just
name was incorrect.
mohor 7500d 17h /ethmac/tags/rel_1/
94 When clear and read/write are active at the same time, cnt and pointers are
set to 1.
mohor 7500d 17h /ethmac/tags/rel_1/
93 When in promiscous mode some frames were not received correctly. Fixed. mohor 7505d 15h /ethmac/tags/rel_1/
92 Some defines that are used in testbench only were moved to tb_eth_defines.v
file.
mohor 7506d 18h /ethmac/tags/rel_1/
91 Comments in Slovene language removed. mohor 7506d 18h /ethmac/tags/rel_1/
90 casex changed with case, fifo reset changed. mohor 7506d 18h /ethmac/tags/rel_1/
89 TX_BD_NUM, MAC_ADDR0 and MAC_ADDR1 register description
changed.
mohor 7510d 16h /ethmac/tags/rel_1/
88 rx_fifo was not always cleared ok. Fixed. mohor 7516d 14h /ethmac/tags/rel_1/
87 Status was not latched correctly sometimes. Fixed. mohor 7516d 17h /ethmac/tags/rel_1/
86 Big Endian problem when sending frames fixed. mohor 7518d 00h /ethmac/tags/rel_1/
85 Log info was missing. mohor 7523d 10h /ethmac/tags/rel_1/

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