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[/] [ethmac/] [tags/] [rel_1/] - Rev 114

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Rev Log message Author Age Path
114 EXTERNAL_DMA removed. External DMA not supported. mohor 7952d 21h /ethmac/tags/rel_1
113 RxPointer bug fixed. mohor 7959d 13h /ethmac/tags/rel_1
112 Previous bug wasn't succesfully removed. Now fixed. mohor 7960d 03h /ethmac/tags/rel_1
111 Master state machine had a bug when switching from master write to
master read.		 mohor 7960d 16h /ethmac/tags/rel_1
110 m_wb_cyc_o signal released after every single transfer. mohor 7960d 20h /ethmac/tags/rel_1
109 Comment removed. mohor 7960d 20h /ethmac/tags/rel_1
108 Testbench supports unaligned accesses. mohor 8028d 06h /ethmac/tags/rel_1
107 TX_BUF_BASE changed. mohor 8028d 06h /ethmac/tags/rel_1
106 Outputs registered. Reset changed for eth_wishbone module. mohor 8028d 06h /ethmac/tags/rel_1
105 Compiler directives added. Tx and Rx fifo size incremented. A "late collision"
bug fixed.		 mohor 8037d 07h /ethmac/tags/rel_1
104 FCS should not be included in NibbleMinFl. mohor 8039d 01h /ethmac/tags/rel_1
103 Wishbone signals are registered when ETH_REGISTERED_OUTPUTS is
selected in eth_defines.v		 mohor 8039d 02h /ethmac/tags/rel_1
102 Interrupts are visible in the ETH_INT_SOURCE regardless if they are enabled
or not.		 mohor 8039d 02h /ethmac/tags/rel_1
101 Short frame and ReceivedLengthOK were not detected correctly. mohor 8039d 02h /ethmac/tags/rel_1
100 Generic ram or Xilinx ram can be used in fifo (selectable by setting
ETH_FIFO_XILINX in eth_defines.v).		 mohor 8039d 03h /ethmac/tags/rel_1
99 Document revised. mohor 8046d 01h /ethmac/tags/rel_1
98 Document revised. mohor 8046d 02h /ethmac/tags/rel_1
97 Small typo fixed. lampret 8063d 00h /ethmac/tags/rel_1
96 Any address can be used for Tx and Rx BD pointers. Address does not need
to be aligned.		 mohor 8067d 00h /ethmac/tags/rel_1
95 md_padoen_o changed to md_padoe_o. Signal was always active high, just
name was incorrect.		 mohor 8067d 03h /ethmac/tags/rel_1

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