OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_1/] - Rev 341

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
338 root 5637d 13h /ethmac/tags/rel_1/
335 New directory structure. root 5694d 18h /ethmac/tags/rel_1/
123 This commit was manufactured by cvs2svn to create tag 'rel_1'. 8115d 12h /ethmac/tags/rel_1/
122 ethernet spram added. So far a generic ram and xilinx RAMB4 are used. mohor 8115d 12h /ethmac/tags/rel_1/
121 gsr added for use when ETH_XILINX_RAMB4 define is set. mohor 8115d 12h /ethmac/tags/rel_1/
120 Unused files removed. mohor 8115d 13h /ethmac/tags/rel_1/
119 Ram , used for BDs changed from generic_spram to eth_spram_256x32. mohor 8115d 13h /ethmac/tags/rel_1/
118 ShiftEnded synchronization changed. mohor 8119d 03h /ethmac/tags/rel_1/
117 Clock mrx_clk set to 2.5 MHz. mohor 8119d 14h /ethmac/tags/rel_1/
116 Testing environment also includes traffic cop, memory interface and host
interface.
mohor 8119d 14h /ethmac/tags/rel_1/
115 RxBDAddress takes `ETH_TX_BD_NUM_DEF value after reset. mohor 8120d 12h /ethmac/tags/rel_1/
114 EXTERNAL_DMA removed. External DMA not supported. mohor 8121d 09h /ethmac/tags/rel_1/
113 RxPointer bug fixed. mohor 8128d 01h /ethmac/tags/rel_1/
112 Previous bug wasn't succesfully removed. Now fixed. mohor 8128d 15h /ethmac/tags/rel_1/
111 Master state machine had a bug when switching from master write to
master read.
mohor 8129d 04h /ethmac/tags/rel_1/
110 m_wb_cyc_o signal released after every single transfer. mohor 8129d 07h /ethmac/tags/rel_1/
109 Comment removed. mohor 8129d 08h /ethmac/tags/rel_1/
108 Testbench supports unaligned accesses. mohor 8196d 18h /ethmac/tags/rel_1/
107 TX_BUF_BASE changed. mohor 8196d 18h /ethmac/tags/rel_1/
106 Outputs registered. Reset changed for eth_wishbone module. mohor 8196d 18h /ethmac/tags/rel_1/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.