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[/] [ethmac/] [tags/] [rel_11/] - Rev 236

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236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 7186d 15h /ethmac/tags/rel_11/
235 rev 4. mohor 7187d 05h /ethmac/tags/rel_11/
234 Figure list assed to the revision 3. mohor 7187d 13h /ethmac/tags/rel_11/
233 Revision 0.3 released. Some figures added. mohor 7187d 14h /ethmac/tags/rel_11/
232 fpga define added. mohor 7192d 09h /ethmac/tags/rel_11/
231 Description of Core Modules added (figure). mohor 7194d 10h /ethmac/tags/rel_11/
229 case changed to casex. mohor 7198d 07h /ethmac/tags/rel_11/
227 Changed BIST scan signals. tadejm 7198d 10h /ethmac/tags/rel_11/
226 Igor added WB burst support and repaired BUG when handling TX under-run and retry. tadejm 7198d 12h /ethmac/tags/rel_11/
225 Some minor changes. tadejm 7198d 12h /ethmac/tags/rel_11/
224 Signals for a wave window in Modelsim. tadejm 7198d 13h /ethmac/tags/rel_11/
223 Some code changed due to bug fixes. tadejm 7198d 13h /ethmac/tags/rel_11/
221 TxStatus is written after last access to the TX fifo is finished (in case of abort
or retry). TxDone is fixed.
mohor 7202d 11h /ethmac/tags/rel_11/
219 txfifo_cnt and rxfifo_cnt counters width is defined in the eth_define.v file,
TxDone and TxRetry are generated after the current WISHBONE access is
finished.
mohor 7205d 12h /ethmac/tags/rel_11/
218 Typo error fixed. (When using Bist) mohor 7205d 14h /ethmac/tags/rel_11/
217 Bist supported. mohor 7205d 14h /ethmac/tags/rel_11/
216 Bist signals added. mohor 7205d 14h /ethmac/tags/rel_11/
215 Bist supported. mohor 7205d 15h /ethmac/tags/rel_11/
214 Signals for WISHBONE B3 compliant interface added. mohor 7206d 11h /ethmac/tags/rel_11/
213 Defines changed to have ETH_ prolog.
ETH_WISHBONE_B# define added.
mohor 7206d 11h /ethmac/tags/rel_11/

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