OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_11/] [rtl/] - Rev 132

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
132 LinkFailRegister is reflecting the status of the PHY's link fail status bit. mohor 6494d 05h /ethmac/tags/rel_11/rtl/
131 LinkFail signal was not latching appropriate bit. mohor 6494d 06h /ethmac/tags/rel_11/rtl/
129 Traffic cop with 2 wishbone master interfaces and 2 wishbona slave
interfaces:
- Host connects to the master interface
- Ethernet master (DMA) connects to the second master interface
- Memory interface connects to the slave interface
- Ethernet slave interface (access to registers and BDs) connects to second
slave interface
mohor 6494d 07h /ethmac/tags/rel_11/rtl/
127 WriteRxDataToMemory signal changed so end of frame (when last word is
written to fifo) is changed.
mohor 6514d 05h /ethmac/tags/rel_11/rtl/
126 InvalidSymbol generation changed. mohor 6514d 05h /ethmac/tags/rel_11/rtl/
125 RxAbort changed. Packets received with MRxErr (from PHY) are also
aborted.
mohor 6514d 06h /ethmac/tags/rel_11/rtl/
122 ethernet spram added. So far a generic ram and xilinx RAMB4 are used. mohor 6516d 07h /ethmac/tags/rel_11/rtl/
120 Unused files removed. mohor 6516d 08h /ethmac/tags/rel_11/rtl/
119 Ram , used for BDs changed from generic_spram to eth_spram_256x32. mohor 6516d 08h /ethmac/tags/rel_11/rtl/
118 ShiftEnded synchronization changed. mohor 6519d 23h /ethmac/tags/rel_11/rtl/
115 RxBDAddress takes `ETH_TX_BD_NUM_DEF value after reset. mohor 6521d 08h /ethmac/tags/rel_11/rtl/
114 EXTERNAL_DMA removed. External DMA not supported. mohor 6522d 05h /ethmac/tags/rel_11/rtl/
113 RxPointer bug fixed. mohor 6528d 21h /ethmac/tags/rel_11/rtl/
112 Previous bug wasn't succesfully removed. Now fixed. mohor 6529d 11h /ethmac/tags/rel_11/rtl/
111 Master state machine had a bug when switching from master write to
master read.
mohor 6530d 00h /ethmac/tags/rel_11/rtl/
110 m_wb_cyc_o signal released after every single transfer. mohor 6530d 03h /ethmac/tags/rel_11/rtl/
109 Comment removed. mohor 6530d 04h /ethmac/tags/rel_11/rtl/
106 Outputs registered. Reset changed for eth_wishbone module. mohor 6597d 14h /ethmac/tags/rel_11/rtl/
105 Compiler directives added. Tx and Rx fifo size incremented. A "late collision"
bug fixed.
mohor 6606d 15h /ethmac/tags/rel_11/rtl/
104 FCS should not be included in NibbleMinFl. mohor 6608d 09h /ethmac/tags/rel_11/rtl/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2020 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.