URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_11/] [rtl/] - Rev 132

Filtering Options

From rev	To rev	Max revs

Search for

Rev	Log message	Author	Age	Path
132	LinkFailRegister is reflecting the status of the PHY's link fail status bit.	mohor	7924d 02h	/ethmac/tags/rel_11/rtl/
131	LinkFail signal was not latching appropriate bit.	mohor	7924d 02h	/ethmac/tags/rel_11/rtl/
129	Traffic cop with 2 wishbone master interfaces and 2 wishbona slave interfaces: - Host connects to the master interface - Ethernet master (DMA) connects to the second master interface - Memory interface connects to the slave interface - Ethernet slave interface (access to registers and BDs) connects to second slave interface	mohor	7924d 03h	/ethmac/tags/rel_11/rtl/
127	WriteRxDataToMemory signal changed so end of frame (when last word is written to fifo) is changed.	mohor	7944d 02h	/ethmac/tags/rel_11/rtl/
126	InvalidSymbol generation changed.	mohor	7944d 02h	/ethmac/tags/rel_11/rtl/
125	RxAbort changed. Packets received with MRxErr (from PHY) are also aborted.	mohor	7944d 02h	/ethmac/tags/rel_11/rtl/
122	ethernet spram added. So far a generic ram and xilinx RAMB4 are used.	mohor	7946d 04h	/ethmac/tags/rel_11/rtl/
120	Unused files removed.	mohor	7946d 05h	/ethmac/tags/rel_11/rtl/
119	Ram , used for BDs changed from generic_spram to eth_spram_256x32.	mohor	7946d 05h	/ethmac/tags/rel_11/rtl/
118	ShiftEnded synchronization changed.	mohor	7949d 19h	/ethmac/tags/rel_11/rtl/
115	RxBDAddress takes `ETH_TX_BD_NUM_DEF value after reset.	mohor	7951d 04h	/ethmac/tags/rel_11/rtl/
114	EXTERNAL_DMA removed. External DMA not supported.	mohor	7952d 01h	/ethmac/tags/rel_11/rtl/
113	RxPointer bug fixed.	mohor	7958d 17h	/ethmac/tags/rel_11/rtl/
112	Previous bug wasn't succesfully removed. Now fixed.	mohor	7959d 07h	/ethmac/tags/rel_11/rtl/
111	Master state machine had a bug when switching from master write to master read.	mohor	7959d 20h	/ethmac/tags/rel_11/rtl/
110	m_wb_cyc_o signal released after every single transfer.	mohor	7959d 23h	/ethmac/tags/rel_11/rtl/
109	Comment removed.	mohor	7960d 00h	/ethmac/tags/rel_11/rtl/
106	Outputs registered. Reset changed for eth_wishbone module.	mohor	8027d 10h	/ethmac/tags/rel_11/rtl/
105	Compiler directives added. Tx and Rx fifo size incremented. A "late collision" bug fixed.	mohor	8036d 11h	/ethmac/tags/rel_11/rtl/
104	FCS should not be included in NibbleMinFl.	mohor	8038d 05h	/ethmac/tags/rel_11/rtl/
103	Wishbone signals are registered when ETH_REGISTERED_OUTPUTS is selected in eth_defines.v	mohor	8038d 06h	/ethmac/tags/rel_11/rtl/
102	Interrupts are visible in the ETH_INT_SOURCE regardless if they are enabled or not.	mohor	8038d 06h	/ethmac/tags/rel_11/rtl/
101	Short frame and ReceivedLengthOK were not detected correctly.	mohor	8038d 06h	/ethmac/tags/rel_11/rtl/
100	Generic ram or Xilinx ram can be used in fifo (selectable by setting ETH_FIFO_XILINX in eth_defines.v).	mohor	8038d 06h	/ethmac/tags/rel_11/rtl/
97	Small typo fixed.	lampret	8062d 04h	/ethmac/tags/rel_11/rtl/
96	Any address can be used for Tx and Rx BD pointers. Address does not need to be aligned.	mohor	8066d 04h	/ethmac/tags/rel_11/rtl/
95	md_padoen_o changed to md_padoe_o. Signal was always active high, just name was incorrect.	mohor	8066d 07h	/ethmac/tags/rel_11/rtl/
94	When clear and read/write are active at the same time, cnt and pointers are set to 1.	mohor	8066d 07h	/ethmac/tags/rel_11/rtl/
93	When in promiscous mode some frames were not received correctly. Fixed.	mohor	8071d 05h	/ethmac/tags/rel_11/rtl/
92	Some defines that are used in testbench only were moved to tb_eth_defines.v file.	mohor	8072d 07h	/ethmac/tags/rel_11/rtl/

Browse

Tools

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_11/] [rtl/] - Rev 132

Filtering Options