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[/] [ethmac/] [tags/] [rel_11/] [rtl/] - Rev 338

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Rev Log message Author Age Path
338 root 3788d 12h /ethmac/tags/rel_11/rtl/
335 New directory structure. root 3845d 18h /ethmac/tags/rel_11/rtl/
249 This commit was manufactured by cvs2svn to create tag 'rel_11'. 6148d 10h /ethmac/tags/rel_11/rtl/
248 wb_rst_i is used for MIIM reset. mohor 6148d 10h /ethmac/tags/rel_11/rtl/
246 Since r_Rst bit is not used any more, default value is changed to 0xa000. mohor 6151d 13h /ethmac/tags/rel_11/rtl/
244 r_Rst signal does not reset any module any more and is removed from the design. mohor 6152d 09h /ethmac/tags/rel_11/rtl/
242 Late collision is reported only when not in the full duplex.
Sample is taken (for status) as soon as MRxDV is not valid (regardless
of the received byte cnt).
tadejm 6153d 05h /ethmac/tags/rel_11/rtl/
241 StartIdle state changed (not important the size of the packet).
StartData1 activates only while ByteCnt is smaller than the MaxFrame.
tadejm 6153d 05h /ethmac/tags/rel_11/rtl/
240 All modules are reset with wb_rst instead of the r_Rst. Exception is MII module. tadejm 6153d 05h /ethmac/tags/rel_11/rtl/
239 RxError is not generated when small frame reception is enabled and small
frames are received.
tadejm 6153d 05h /ethmac/tags/rel_11/rtl/
238 Defines fixed to use generic RAM by default. mohor 6165d 09h /ethmac/tags/rel_11/rtl/
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 6167d 15h /ethmac/tags/rel_11/rtl/
232 fpga define added. mohor 6173d 09h /ethmac/tags/rel_11/rtl/
229 case changed to casex. mohor 6179d 07h /ethmac/tags/rel_11/rtl/
227 Changed BIST scan signals. tadejm 6179d 11h /ethmac/tags/rel_11/rtl/
226 Igor added WB burst support and repaired BUG when handling TX under-run and retry. tadejm 6179d 12h /ethmac/tags/rel_11/rtl/
221 TxStatus is written after last access to the TX fifo is finished (in case of abort
or retry). TxDone is fixed.
mohor 6183d 12h /ethmac/tags/rel_11/rtl/
219 txfifo_cnt and rxfifo_cnt counters width is defined in the eth_define.v file,
TxDone and TxRetry are generated after the current WISHBONE access is
finished.
mohor 6186d 12h /ethmac/tags/rel_11/rtl/
218 Typo error fixed. (When using Bist) mohor 6186d 14h /ethmac/tags/rel_11/rtl/
214 Signals for WISHBONE B3 compliant interface added. mohor 6187d 11h /ethmac/tags/rel_11/rtl/

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