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Rev Log message Author Age Path
240 All modules are reset with wb_rst instead of the r_Rst. Exception is MII module. tadejm 6185d 05h /ethmac/tags/rel_12/
239 RxError is not generated when small frame reception is enabled and small
frames are received.
tadejm 6185d 05h /ethmac/tags/rel_12/
238 Defines fixed to use generic RAM by default. mohor 6197d 09h /ethmac/tags/rel_12/
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 6199d 14h /ethmac/tags/rel_12/
235 rev 4. mohor 6200d 05h /ethmac/tags/rel_12/
234 Figure list assed to the revision 3. mohor 6200d 13h /ethmac/tags/rel_12/
233 Revision 0.3 released. Some figures added. mohor 6200d 14h /ethmac/tags/rel_12/
232 fpga define added. mohor 6205d 09h /ethmac/tags/rel_12/
231 Description of Core Modules added (figure). mohor 6207d 10h /ethmac/tags/rel_12/
229 case changed to casex. mohor 6211d 07h /ethmac/tags/rel_12/
227 Changed BIST scan signals. tadejm 6211d 10h /ethmac/tags/rel_12/
226 Igor added WB burst support and repaired BUG when handling TX under-run and retry. tadejm 6211d 12h /ethmac/tags/rel_12/
225 Some minor changes. tadejm 6211d 12h /ethmac/tags/rel_12/
224 Signals for a wave window in Modelsim. tadejm 6211d 13h /ethmac/tags/rel_12/
223 Some code changed due to bug fixes. tadejm 6211d 13h /ethmac/tags/rel_12/
221 TxStatus is written after last access to the TX fifo is finished (in case of abort
or retry). TxDone is fixed.
mohor 6215d 11h /ethmac/tags/rel_12/
219 txfifo_cnt and rxfifo_cnt counters width is defined in the eth_define.v file,
TxDone and TxRetry are generated after the current WISHBONE access is
finished.
mohor 6218d 12h /ethmac/tags/rel_12/
218 Typo error fixed. (When using Bist) mohor 6218d 14h /ethmac/tags/rel_12/
217 Bist supported. mohor 6218d 14h /ethmac/tags/rel_12/
216 Bist signals added. mohor 6218d 14h /ethmac/tags/rel_12/

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