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257 When TxUsedData and CtrlMux occur at the same time, byte counter needs
to be incremented by 2. Signal IncrementByteCntBy2 added for that reason.
mohor 7157d 16h /ethmac/tags/rel_12
256 TxDone and TxAbort changed so they're not propagated to the wishbone
module when control frame is transmitted.
mohor 7157d 16h /ethmac/tags/rel_12
255 TPauseRq synchronized to tx_clk. mohor 7157d 16h /ethmac/tags/rel_12
254 Temp version. mohor 7158d 20h /ethmac/tags/rel_12
253 r_MiiMRst is not used for resetting the MIIM module. wb_rst used instead. mohor 7158d 22h /ethmac/tags/rel_12
252 Just some updates. tadejm 7158d 23h /ethmac/tags/rel_12
251 When control frame (PAUSE) was sent, status was written in the
eth_wishbone module and both TXB and TXC interrupts were set. Fixed.
Only TXC interrupt is set.
mohor 7158d 23h /ethmac/tags/rel_12
250 AddressMiss status is connecting to the Rx BD. AddressMiss is identifying
that a frame was received because of the promiscous mode.
mohor 7158d 23h /ethmac/tags/rel_12
248 wb_rst_i is used for MIIM reset. mohor 7159d 23h /ethmac/tags/rel_12
246 Since r_Rst bit is not used any more, default value is changed to 0xa000. mohor 7163d 02h /ethmac/tags/rel_12
245 Rev 1.7. mohor 7163d 19h /ethmac/tags/rel_12
244 r_Rst signal does not reset any module any more and is removed from the design. mohor 7163d 22h /ethmac/tags/rel_12
243 Late collision is not reported any more. tadejm 7164d 03h /ethmac/tags/rel_12
242 Late collision is reported only when not in the full duplex.
Sample is taken (for status) as soon as MRxDV is not valid (regardless
of the received byte cnt).
tadejm 7164d 18h /ethmac/tags/rel_12
241 StartIdle state changed (not important the size of the packet).
StartData1 activates only while ByteCnt is smaller than the MaxFrame.
tadejm 7164d 18h /ethmac/tags/rel_12
240 All modules are reset with wb_rst instead of the r_Rst. Exception is MII module. tadejm 7164d 18h /ethmac/tags/rel_12
239 RxError is not generated when small frame reception is enabled and small
frames are received.
tadejm 7164d 18h /ethmac/tags/rel_12
238 Defines fixed to use generic RAM by default. mohor 7176d 22h /ethmac/tags/rel_12
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 7179d 03h /ethmac/tags/rel_12
235 rev 4. mohor 7179d 18h /ethmac/tags/rel_12

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