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338 root 5442d 00h /ethmac/tags/rel_12/rtl/
335 New directory structure. root 5499d 05h /ethmac/tags/rel_12/rtl/
258 This commit was manufactured by cvs2svn to create tag 'rel_12'. 7799d 15h /ethmac/tags/rel_12/rtl/
257 When TxUsedData and CtrlMux occur at the same time, byte counter needs
to be incremented by 2. Signal IncrementByteCntBy2 added for that reason.
mohor 7799d 15h /ethmac/tags/rel_12/rtl/
256 TxDone and TxAbort changed so they're not propagated to the wishbone
module when control frame is transmitted.
mohor 7799d 15h /ethmac/tags/rel_12/rtl/
255 TPauseRq synchronized to tx_clk. mohor 7799d 15h /ethmac/tags/rel_12/rtl/
253 r_MiiMRst is not used for resetting the MIIM module. wb_rst used instead. mohor 7800d 21h /ethmac/tags/rel_12/rtl/
251 When control frame (PAUSE) was sent, status was written in the
eth_wishbone module and both TXB and TXC interrupts were set. Fixed.
Only TXC interrupt is set.
mohor 7800d 22h /ethmac/tags/rel_12/rtl/
250 AddressMiss status is connecting to the Rx BD. AddressMiss is identifying
that a frame was received because of the promiscous mode.
mohor 7800d 22h /ethmac/tags/rel_12/rtl/
248 wb_rst_i is used for MIIM reset. mohor 7801d 22h /ethmac/tags/rel_12/rtl/
246 Since r_Rst bit is not used any more, default value is changed to 0xa000. mohor 7805d 01h /ethmac/tags/rel_12/rtl/
244 r_Rst signal does not reset any module any more and is removed from the design. mohor 7805d 21h /ethmac/tags/rel_12/rtl/
242 Late collision is reported only when not in the full duplex.
Sample is taken (for status) as soon as MRxDV is not valid (regardless
of the received byte cnt).
tadejm 7806d 17h /ethmac/tags/rel_12/rtl/
241 StartIdle state changed (not important the size of the packet).
StartData1 activates only while ByteCnt is smaller than the MaxFrame.
tadejm 7806d 17h /ethmac/tags/rel_12/rtl/
240 All modules are reset with wb_rst instead of the r_Rst. Exception is MII module. tadejm 7806d 17h /ethmac/tags/rel_12/rtl/
239 RxError is not generated when small frame reception is enabled and small
frames are received.
tadejm 7806d 17h /ethmac/tags/rel_12/rtl/
238 Defines fixed to use generic RAM by default. mohor 7818d 21h /ethmac/tags/rel_12/rtl/
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 7821d 02h /ethmac/tags/rel_12/rtl/
232 fpga define added. mohor 7826d 20h /ethmac/tags/rel_12/rtl/
229 case changed to casex. mohor 7832d 18h /ethmac/tags/rel_12/rtl/

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