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Rev Log message Author Age Path
213 Defines changed to have ETH_ prolog.
ETH_WISHBONE_B# define added.
mohor 7359d 22h /ethmac/tags/rel_13/
212 Minor $display change. mohor 7359d 22h /ethmac/tags/rel_13/
211 Bist added. mohor 7359d 23h /ethmac/tags/rel_13/
210 BIST added. mohor 7359d 23h /ethmac/tags/rel_13/
209 Just back-up; not completed testbench and some testcases are not
wotking properly yet.
tadejm 7361d 02h /ethmac/tags/rel_13/
208 Virtual Silicon RAMs moved to lib directory tadej 7376d 20h /ethmac/tags/rel_13/
207 Virtual Silicon RAM support fixed tadej 7376d 20h /ethmac/tags/rel_13/
206 Virtual Silicon RAM added to the simulation. mohor 7376d 20h /ethmac/tags/rel_13/
205 ETH_VIRTUAL_SILICON_RAM supported. mohor 7376d 21h /ethmac/tags/rel_13/
204 ETH_VIRTUAL_SILICON_RAM supported (for ASIC implementation). mohor 7376d 21h /ethmac/tags/rel_13/
203 Virtual Silicon RAM might be used in the ASIC implementation of the ethernet
mohor 7376d 21h /ethmac/tags/rel_13/
202 CsMiss added. When address between 0x800 and 0xfff is accessed within
Ethernet Core, error acknowledge is generated.
mohor 7379d 22h /ethmac/tags/rel_13/
201 Core size added to the document. mohor 7379d 23h /ethmac/tags/rel_13/
200 File with lower case checked in instead. mohor 7379d 23h /ethmac/tags/rel_13/
199 Datasheet name changed to lower case name. mohor 7379d 23h /ethmac/tags/rel_13/
198 Removed file. File with name in lower case will be added instead. mohor 7379d 23h /ethmac/tags/rel_13/
197 Ethernet Data Sheet. mohor 7379d 23h /ethmac/tags/rel_13/
196 Ethernet product brief. mohor 7380d 00h /ethmac/tags/rel_13/
195 Product brief removed because it is the same as Datasheet. mohor 7380d 00h /ethmac/tags/rel_13/
194 Full duplex tests modified and testbench bug repaired. tadej 7380d 01h /ethmac/tags/rel_13/

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