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[/] [ethmac/] [tags/] [rel_13/] [rtl] - Rev 244

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244 r_Rst signal does not reset any module any more and is removed from the design. mohor 7325d 03h /ethmac/tags/rel_13/rtl
242 Late collision is reported only when not in the full duplex.
Sample is taken (for status) as soon as MRxDV is not valid (regardless
of the received byte cnt).
tadejm 7325d 23h /ethmac/tags/rel_13/rtl
241 StartIdle state changed (not important the size of the packet).
StartData1 activates only while ByteCnt is smaller than the MaxFrame.
tadejm 7325d 23h /ethmac/tags/rel_13/rtl
240 All modules are reset with wb_rst instead of the r_Rst. Exception is MII module. tadejm 7325d 23h /ethmac/tags/rel_13/rtl
239 RxError is not generated when small frame reception is enabled and small
frames are received.
tadejm 7325d 23h /ethmac/tags/rel_13/rtl
238 Defines fixed to use generic RAM by default. mohor 7338d 03h /ethmac/tags/rel_13/rtl
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 7340d 09h /ethmac/tags/rel_13/rtl
232 fpga define added. mohor 7346d 03h /ethmac/tags/rel_13/rtl
229 case changed to casex. mohor 7352d 01h /ethmac/tags/rel_13/rtl
227 Changed BIST scan signals. tadejm 7352d 05h /ethmac/tags/rel_13/rtl
226 Igor added WB burst support and repaired BUG when handling TX under-run and retry. tadejm 7352d 06h /ethmac/tags/rel_13/rtl
221 TxStatus is written after last access to the TX fifo is finished (in case of abort
or retry). TxDone is fixed.
mohor 7356d 05h /ethmac/tags/rel_13/rtl
219 txfifo_cnt and rxfifo_cnt counters width is defined in the eth_define.v file,
TxDone and TxRetry are generated after the current WISHBONE access is
finished.
mohor 7359d 06h /ethmac/tags/rel_13/rtl
218 Typo error fixed. (When using Bist) mohor 7359d 08h /ethmac/tags/rel_13/rtl
214 Signals for WISHBONE B3 compliant interface added. mohor 7360d 05h /ethmac/tags/rel_13/rtl
213 Defines changed to have ETH_ prolog.
ETH_WISHBONE_B# define added.
mohor 7360d 05h /ethmac/tags/rel_13/rtl
212 Minor $display change. mohor 7360d 05h /ethmac/tags/rel_13/rtl
211 Bist added. mohor 7360d 05h /ethmac/tags/rel_13/rtl
210 BIST added. mohor 7360d 05h /ethmac/tags/rel_13/rtl
204 ETH_VIRTUAL_SILICON_RAM supported (for ASIC implementation). mohor 7377d 03h /ethmac/tags/rel_13/rtl

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