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[/] [ethmac/] [tags/] [rel_15/] - Rev 338

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252 Just some updates. tadejm 7799d 16h /ethmac/tags/rel_15
251 When control frame (PAUSE) was sent, status was written in the
eth_wishbone module and both TXB and TXC interrupts were set. Fixed.
Only TXC interrupt is set.
mohor 7799d 16h /ethmac/tags/rel_15
250 AddressMiss status is connecting to the Rx BD. AddressMiss is identifying
that a frame was received because of the promiscous mode.
mohor 7799d 16h /ethmac/tags/rel_15
248 wb_rst_i is used for MIIM reset. mohor 7800d 16h /ethmac/tags/rel_15
246 Since r_Rst bit is not used any more, default value is changed to 0xa000. mohor 7803d 19h /ethmac/tags/rel_15
245 Rev 1.7. mohor 7804d 13h /ethmac/tags/rel_15
244 r_Rst signal does not reset any module any more and is removed from the design. mohor 7804d 15h /ethmac/tags/rel_15
243 Late collision is not reported any more. tadejm 7804d 20h /ethmac/tags/rel_15
242 Late collision is reported only when not in the full duplex.
Sample is taken (for status) as soon as MRxDV is not valid (regardless
of the received byte cnt).
tadejm 7805d 11h /ethmac/tags/rel_15
241 StartIdle state changed (not important the size of the packet).
StartData1 activates only while ByteCnt is smaller than the MaxFrame.
tadejm 7805d 11h /ethmac/tags/rel_15

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