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[/] [ethmac/] [tags/] [rel_15/] - Rev 92

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Rev Log message Author Age Path
92 Some defines that are used in testbench only were moved to tb_eth_defines.v
file.		 mohor 8066d 11h /ethmac/tags/rel_15/
91 Comments in Slovene language removed. mohor 8066d 11h /ethmac/tags/rel_15/
90 casex changed with case, fifo reset changed. mohor 8066d 11h /ethmac/tags/rel_15/
89 TX_BD_NUM, MAC_ADDR0 and MAC_ADDR1 register description
changed.		 mohor 8070d 09h /ethmac/tags/rel_15/
88 rx_fifo was not always cleared ok. Fixed. mohor 8076d 08h /ethmac/tags/rel_15/
87 Status was not latched correctly sometimes. Fixed. mohor 8076d 10h /ethmac/tags/rel_15/
86 Big Endian problem when sending frames fixed. mohor 8077d 17h /ethmac/tags/rel_15/
85 Log info was missing. mohor 8083d 03h /ethmac/tags/rel_15/
84 LinkFail signal was not latching appropriate bit. mohor 8083d 03h /ethmac/tags/rel_15/
83 MAC address recognition was not correct (bytes swaped). mohor 8083d 03h /ethmac/tags/rel_15/
82 Byte ordering changed (Big Endian used). casex changed with case because
Xilinx Foundation had problems. Tested in HW. It WORKS.		 mohor 8083d 05h /ethmac/tags/rel_15/
81 Typos fixed, INT_SOURCE and INT_MASK registers changed. mohor 8083d 05h /ethmac/tags/rel_15/
80 Small fixes for external/internal DMA missmatches. mohor 8087d 07h /ethmac/tags/rel_15/
79 RetryCntLatched was unused and removed from design mohor 8087d 08h /ethmac/tags/rel_15/
78 WB_SEL_I was unused and removed from design mohor 8087d 08h /ethmac/tags/rel_15/
77 Interrupts changed mohor 8087d 08h /ethmac/tags/rel_15/
76 Interrupts changed in the top file mohor 8087d 08h /ethmac/tags/rel_15/
75 r_Bro is used for accepting/denying frames mohor 8087d 08h /ethmac/tags/rel_15/
74 Reset values are passed to registers through parameters mohor 8087d 08h /ethmac/tags/rel_15/
73 Number of interrupts changed mohor 8087d 08h /ethmac/tags/rel_15/

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