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[/] [ethmac/] [tags/] [rel_15/] [bench/] - Rev 182

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Rev Log message Author Age Path
67 EXTERNAL_DMA used instead of WISHBONE_DMA. mohor 6859d 01h /ethmac/tags/rel_15/bench/
66 Testbench fixed, code simplified, unused signals removed. mohor 6859d 07h /ethmac/tags/rel_15/bench/
51 Added separate tests for Multicast, Unicast, Broadcast billditt 6860d 18h /ethmac/tags/rel_15/bench/
49 HASH0 and HASH1 register read/write added. mohor 6862d 18h /ethmac/tags/rel_15/bench/
41 non-DMA host interface added. Select the right configutation in eth_defines. mohor 6869d 00h /ethmac/tags/rel_15/bench/
36 TX_BD_NUM register added instead of the RB_BD_ADDR. mohor 6929d 02h /ethmac/tags/rel_15/bench/
23 Number of addresses (wb_adr_i) minimized. mohor 6979d 03h /ethmac/tags/rel_15/bench/
22 eth_timescale.v changed to timescale.v This is done because of the
simulation of the few cores in a one joined project.
mohor 6979d 06h /ethmac/tags/rel_15/bench/
19 Defines changed (All precede with ETH_). Small changes because some
tools generate warnings when two operands are together. Synchronization
between two clocks domains in eth_wishbonedma.v is changed (due to ASIC
demands).
mohor 7003d 23h /ethmac/tags/rel_15/bench/
17 Signal names changed on the top level for easier pad insertion (ASIC). mohor 7044d 00h /ethmac/tags/rel_15/bench/

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