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Rev Log message Author Age Path
245 Rev 1.7. mohor 7993d 21h /ethmac/tags/rel_16/
244 r_Rst signal does not reset any module any more and is removed from the design. mohor 7993d 23h /ethmac/tags/rel_16/
243 Late collision is not reported any more. tadejm 7994d 04h /ethmac/tags/rel_16/
242 Late collision is reported only when not in the full duplex.
Sample is taken (for status) as soon as MRxDV is not valid (regardless
of the received byte cnt).		 tadejm 7994d 19h /ethmac/tags/rel_16/
241 StartIdle state changed (not important the size of the packet).
StartData1 activates only while ByteCnt is smaller than the MaxFrame.		 tadejm 7994d 19h /ethmac/tags/rel_16/
240 All modules are reset with wb_rst instead of the r_Rst. Exception is MII module. tadejm 7994d 19h /ethmac/tags/rel_16/
239 RxError is not generated when small frame reception is enabled and small
frames are received.		 tadejm 7994d 19h /ethmac/tags/rel_16/
238 Defines fixed to use generic RAM by default. mohor 8006d 23h /ethmac/tags/rel_16/
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 8009d 04h /ethmac/tags/rel_16/
235 rev 4. mohor 8009d 19h /ethmac/tags/rel_16/
234 Figure list assed to the revision 3. mohor 8010d 03h /ethmac/tags/rel_16/
233 Revision 0.3 released. Some figures added. mohor 8010d 04h /ethmac/tags/rel_16/
232 fpga define added. mohor 8014d 23h /ethmac/tags/rel_16/
231 Description of Core Modules added (figure). mohor 8017d 00h /ethmac/tags/rel_16/
229 case changed to casex. mohor 8020d 20h /ethmac/tags/rel_16/
227 Changed BIST scan signals. tadejm 8021d 00h /ethmac/tags/rel_16/
226 Igor added WB burst support and repaired BUG when handling TX under-run and retry. tadejm 8021d 02h /ethmac/tags/rel_16/
225 Some minor changes. tadejm 8021d 02h /ethmac/tags/rel_16/
224 Signals for a wave window in Modelsim. tadejm 8021d 03h /ethmac/tags/rel_16/
223 Some code changed due to bug fixes. tadejm 8021d 03h /ethmac/tags/rel_16/

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