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259 In loopback rx_clk is not looped back. Possible CRC error. Consider if usage
of additional logic is necessery (FIFO for looping the data).
mohor 7798d 11h /ethmac/tags/rel_16/
257 When TxUsedData and CtrlMux occur at the same time, byte counter needs
to be incremented by 2. Signal IncrementByteCntBy2 added for that reason.
mohor 7798d 11h /ethmac/tags/rel_16/
256 TxDone and TxAbort changed so they're not propagated to the wishbone
module when control frame is transmitted.
mohor 7798d 11h /ethmac/tags/rel_16/
255 TPauseRq synchronized to tx_clk. mohor 7798d 11h /ethmac/tags/rel_16/
254 Temp version. mohor 7799d 15h /ethmac/tags/rel_16/
253 r_MiiMRst is not used for resetting the MIIM module. wb_rst used instead. mohor 7799d 17h /ethmac/tags/rel_16/
252 Just some updates. tadejm 7799d 18h /ethmac/tags/rel_16/
251 When control frame (PAUSE) was sent, status was written in the
eth_wishbone module and both TXB and TXC interrupts were set. Fixed.
Only TXC interrupt is set.
mohor 7799d 18h /ethmac/tags/rel_16/
250 AddressMiss status is connecting to the Rx BD. AddressMiss is identifying
that a frame was received because of the promiscous mode.
mohor 7799d 18h /ethmac/tags/rel_16/
248 wb_rst_i is used for MIIM reset. mohor 7800d 18h /ethmac/tags/rel_16/

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