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[/] [ethmac/] [tags/] [rel_17/] [rtl/] [verilog/] [eth_rxaddrcheck.v] - Rev 338

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Rev Log message Author Age Path
338 root 4112d 15h /ethmac/tags/rel_17/rtl/verilog/eth_rxaddrcheck.v
335 New directory structure. root 4169d 20h /ethmac/tags/rel_17/rtl/verilog/eth_rxaddrcheck.v
287 This commit was manufactured by cvs2svn to create tag 'rel_17'. 6265d 19h /ethmac/tags/rel_17/rtl/verilog/eth_rxaddrcheck.v
261 Rx Flow control fixed. CF flag added to the RX buffer descriptor. RxAbort
synchronized.
mohor 6469d 04h /ethmac/tags/rel_17/rtl/verilog/eth_rxaddrcheck.v
250 AddressMiss status is connecting to the Rx BD. AddressMiss is identifying
that a frame was received because of the promiscous mode.
mohor 6471d 13h /ethmac/tags/rel_17/rtl/verilog/eth_rxaddrcheck.v
148 Bug when last byte of destination address was not checked fixed. mohor 6547d 12h /ethmac/tags/rel_17/rtl/verilog/eth_rxaddrcheck.v
93 When in promiscous mode some frames were not received correctly. Fixed. mohor 6715d 15h /ethmac/tags/rel_17/rtl/verilog/eth_rxaddrcheck.v
85 Log info was missing. mohor 6733d 09h /ethmac/tags/rel_17/rtl/verilog/eth_rxaddrcheck.v
83 MAC address recognition was not correct (bytes swaped). mohor 6733d 09h /ethmac/tags/rel_17/rtl/verilog/eth_rxaddrcheck.v
75 r_Bro is used for accepting/denying frames mohor 6737d 14h /ethmac/tags/rel_17/rtl/verilog/eth_rxaddrcheck.v
65 Testbench fixed, code simplified, unused signals removed. mohor 6747d 23h /ethmac/tags/rel_17/rtl/verilog/eth_rxaddrcheck.v
50 checks destination address for Unicast, Multicast and Broadcast ops billditt 6749d 11h /ethmac/tags/rel_17/rtl/verilog/eth_rxaddrcheck.v

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