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[/] [ethmac/] [tags/] [rel_17/] [rtl/] [verilog/] [eth_spram_256x32.v] - Rev 338

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Rev Log message Author Age Path
338 root 5441d 02h /ethmac/tags/rel_17/rtl/verilog/eth_spram_256x32.v
335 New directory structure. root 5498d 08h /ethmac/tags/rel_17/rtl/verilog/eth_spram_256x32.v
287 This commit was manufactured by cvs2svn to create tag 'rel_17'. 7594d 06h /ethmac/tags/rel_17/rtl/verilog/eth_spram_256x32.v
227 Changed BIST scan signals. tadejm 7832d 01h /ethmac/tags/rel_17/rtl/verilog/eth_spram_256x32.v
210 BIST added. mohor 7840d 01h /ethmac/tags/rel_17/rtl/verilog/eth_spram_256x32.v
204 ETH_VIRTUAL_SILICON_RAM supported (for ASIC implementation). mohor 7856d 23h /ethmac/tags/rel_17/rtl/verilog/eth_spram_256x32.v
122 ethernet spram added. So far a generic ram and xilinx RAMB4 are used. mohor 7919d 01h /ethmac/tags/rel_17/rtl/verilog/eth_spram_256x32.v

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