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Rev Log message Author Age Path
256 TxDone and TxAbort changed so they're not propagated to the wishbone
module when control frame is transmitted.		 mohor 7821d 04h /ethmac/tags/rel_19/
255 TPauseRq synchronized to tx_clk. mohor 7821d 04h /ethmac/tags/rel_19/
254 Temp version. mohor 7822d 08h /ethmac/tags/rel_19/
253 r_MiiMRst is not used for resetting the MIIM module. wb_rst used instead. mohor 7822d 10h /ethmac/tags/rel_19/
252 Just some updates. tadejm 7822d 11h /ethmac/tags/rel_19/
251 When control frame (PAUSE) was sent, status was written in the
eth_wishbone module and both TXB and TXC interrupts were set. Fixed.
Only TXC interrupt is set.		 mohor 7822d 11h /ethmac/tags/rel_19/
250 AddressMiss status is connecting to the Rx BD. AddressMiss is identifying
that a frame was received because of the promiscous mode.		 mohor 7822d 11h /ethmac/tags/rel_19/
248 wb_rst_i is used for MIIM reset. mohor 7823d 11h /ethmac/tags/rel_19/
246 Since r_Rst bit is not used any more, default value is changed to 0xa000. mohor 7826d 14h /ethmac/tags/rel_19/
245 Rev 1.7. mohor 7827d 07h /ethmac/tags/rel_19/
244 r_Rst signal does not reset any module any more and is removed from the design. mohor 7827d 10h /ethmac/tags/rel_19/
243 Late collision is not reported any more. tadejm 7827d 15h /ethmac/tags/rel_19/
242 Late collision is reported only when not in the full duplex.
Sample is taken (for status) as soon as MRxDV is not valid (regardless
of the received byte cnt).		 tadejm 7828d 06h /ethmac/tags/rel_19/
241 StartIdle state changed (not important the size of the packet).
StartData1 activates only while ByteCnt is smaller than the MaxFrame.		 tadejm 7828d 06h /ethmac/tags/rel_19/
240 All modules are reset with wb_rst instead of the r_Rst. Exception is MII module. tadejm 7828d 06h /ethmac/tags/rel_19/
239 RxError is not generated when small frame reception is enabled and small
frames are received.		 tadejm 7828d 06h /ethmac/tags/rel_19/
238 Defines fixed to use generic RAM by default. mohor 7840d 10h /ethmac/tags/rel_19/
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 7842d 15h /ethmac/tags/rel_19/
235 rev 4. mohor 7843d 06h /ethmac/tags/rel_19/
234 Figure list assed to the revision 3. mohor 7843d 14h /ethmac/tags/rel_19/

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