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[/] [ethmac/] [tags/] [rel_19/] [rtl/] [verilog/] [eth_spram_256x32.v] - Rev 338

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Rev Log message Author Age Path
338 root 4112d 14h /ethmac/tags/rel_19/rtl/verilog/eth_spram_256x32.v
335 New directory structure. root 4169d 19h /ethmac/tags/rel_19/rtl/verilog/eth_spram_256x32.v
296 This commit was manufactured by cvs2svn to create tag 'rel_19'. 6204d 16h /ethmac/tags/rel_19/rtl/verilog/eth_spram_256x32.v
227 Changed BIST scan signals. tadejm 6503d 12h /ethmac/tags/rel_19/rtl/verilog/eth_spram_256x32.v
210 BIST added. mohor 6511d 13h /ethmac/tags/rel_19/rtl/verilog/eth_spram_256x32.v
204 ETH_VIRTUAL_SILICON_RAM supported (for ASIC implementation). mohor 6528d 11h /ethmac/tags/rel_19/rtl/verilog/eth_spram_256x32.v
122 ethernet spram added. So far a generic ram and xilinx RAMB4 are used. mohor 6590d 13h /ethmac/tags/rel_19/rtl/verilog/eth_spram_256x32.v

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