OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_2/] - Rev 100

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
100 Generic ram or Xilinx ram can be used in fifo (selectable by setting
ETH_FIFO_XILINX in eth_defines.v).
mohor 8032d 03h /ethmac/tags/rel_2/
99 Document revised. mohor 8039d 02h /ethmac/tags/rel_2/
98 Document revised. mohor 8039d 02h /ethmac/tags/rel_2/
97 Small typo fixed. lampret 8056d 01h /ethmac/tags/rel_2/
96 Any address can be used for Tx and Rx BD pointers. Address does not need
to be aligned.
mohor 8060d 01h /ethmac/tags/rel_2/
95 md_padoen_o changed to md_padoe_o. Signal was always active high, just
name was incorrect.
mohor 8060d 04h /ethmac/tags/rel_2/
94 When clear and read/write are active at the same time, cnt and pointers are
set to 1.
mohor 8060d 04h /ethmac/tags/rel_2/
93 When in promiscous mode some frames were not received correctly. Fixed. mohor 8065d 02h /ethmac/tags/rel_2/
92 Some defines that are used in testbench only were moved to tb_eth_defines.v
file.
mohor 8066d 04h /ethmac/tags/rel_2/
91 Comments in Slovene language removed. mohor 8066d 04h /ethmac/tags/rel_2/
90 casex changed with case, fifo reset changed. mohor 8066d 04h /ethmac/tags/rel_2/
89 TX_BD_NUM, MAC_ADDR0 and MAC_ADDR1 register description
changed.
mohor 8070d 02h /ethmac/tags/rel_2/
88 rx_fifo was not always cleared ok. Fixed. mohor 8076d 01h /ethmac/tags/rel_2/
87 Status was not latched correctly sometimes. Fixed. mohor 8076d 03h /ethmac/tags/rel_2/
86 Big Endian problem when sending frames fixed. mohor 8077d 10h /ethmac/tags/rel_2/
85 Log info was missing. mohor 8082d 20h /ethmac/tags/rel_2/
84 LinkFail signal was not latching appropriate bit. mohor 8082d 20h /ethmac/tags/rel_2/
83 MAC address recognition was not correct (bytes swaped). mohor 8082d 20h /ethmac/tags/rel_2/
82 Byte ordering changed (Big Endian used). casex changed with case because
Xilinx Foundation had problems. Tested in HW. It WORKS.
mohor 8082d 22h /ethmac/tags/rel_2/
81 Typos fixed, INT_SOURCE and INT_MASK registers changed. mohor 8082d 22h /ethmac/tags/rel_2/
80 Small fixes for external/internal DMA missmatches. mohor 8087d 00h /ethmac/tags/rel_2/
79 RetryCntLatched was unused and removed from design mohor 8087d 01h /ethmac/tags/rel_2/
78 WB_SEL_I was unused and removed from design mohor 8087d 01h /ethmac/tags/rel_2/
77 Interrupts changed mohor 8087d 01h /ethmac/tags/rel_2/
76 Interrupts changed in the top file mohor 8087d 01h /ethmac/tags/rel_2/
75 r_Bro is used for accepting/denying frames mohor 8087d 01h /ethmac/tags/rel_2/
74 Reset values are passed to registers through parameters mohor 8087d 01h /ethmac/tags/rel_2/
73 Number of interrupts changed mohor 8087d 01h /ethmac/tags/rel_2/
72 Retry is not activated when a Tx Underrun occured mohor 8091d 04h /ethmac/tags/rel_2/
71 Address recognition system added. Buffer Descriptors changed. DMA section
changed. Ports changed.
mohor 8095d 06h /ethmac/tags/rel_2/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.