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Rev Log message Author Age Path
113 RxPointer bug fixed. mohor 6358d 09h /ethmac/tags/rel_2/
112 Previous bug wasn't succesfully removed. Now fixed. mohor 6358d 23h /ethmac/tags/rel_2/
111 Master state machine had a bug when switching from master write to
master read.
mohor 6359d 12h /ethmac/tags/rel_2/
110 m_wb_cyc_o signal released after every single transfer. mohor 6359d 15h /ethmac/tags/rel_2/
109 Comment removed. mohor 6359d 16h /ethmac/tags/rel_2/
108 Testbench supports unaligned accesses. mohor 6427d 02h /ethmac/tags/rel_2/
107 TX_BUF_BASE changed. mohor 6427d 02h /ethmac/tags/rel_2/
106 Outputs registered. Reset changed for eth_wishbone module. mohor 6427d 02h /ethmac/tags/rel_2/
105 Compiler directives added. Tx and Rx fifo size incremented. A "late collision"
bug fixed.
mohor 6436d 03h /ethmac/tags/rel_2/
104 FCS should not be included in NibbleMinFl. mohor 6437d 21h /ethmac/tags/rel_2/
103 Wishbone signals are registered when ETH_REGISTERED_OUTPUTS is
selected in eth_defines.v
mohor 6437d 22h /ethmac/tags/rel_2/
102 Interrupts are visible in the ETH_INT_SOURCE regardless if they are enabled
or not.
mohor 6437d 22h /ethmac/tags/rel_2/
101 Short frame and ReceivedLengthOK were not detected correctly. mohor 6437d 22h /ethmac/tags/rel_2/
100 Generic ram or Xilinx ram can be used in fifo (selectable by setting
ETH_FIFO_XILINX in eth_defines.v).
mohor 6437d 22h /ethmac/tags/rel_2/
99 Document revised. mohor 6444d 21h /ethmac/tags/rel_2/
98 Document revised. mohor 6444d 22h /ethmac/tags/rel_2/
97 Small typo fixed. lampret 6461d 20h /ethmac/tags/rel_2/
96 Any address can be used for Tx and Rx BD pointers. Address does not need
to be aligned.
mohor 6465d 20h /ethmac/tags/rel_2/
95 md_padoen_o changed to md_padoe_o. Signal was always active high, just
name was incorrect.
mohor 6465d 23h /ethmac/tags/rel_2/
94 When clear and read/write are active at the same time, cnt and pointers are
set to 1.
mohor 6465d 23h /ethmac/tags/rel_2/

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