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190 Several information added to the file. mohor 7440d 19h /ethmac/tags/rel_20
189 Simple testbench that includes eth_cop, eth_host and eth_memory modules.
This testbench is used for testing the whole environment. Use tb_ethernet
testbench for testing just the ethernet MAC core (many tests).
mohor 7440d 19h /ethmac/tags/rel_20
188 PHY changed. tadej 7441d 16h /ethmac/tags/rel_20
187 _info file added. mohor 7441d 16h /ethmac/tags/rel_20
186 Macro for testbench (DO file). mohor 7441d 16h /ethmac/tags/rel_20
185 Directory keeper. mohor 7441d 17h /ethmac/tags/rel_20
184 Modelsim simulation environment should be ready now. mohor 7441d 17h /ethmac/tags/rel_20
183 Modelsim environment added. mohor 7441d 17h /ethmac/tags/rel_20
182 Full duplex test improved. tadej 7442d 18h /ethmac/tags/rel_20
181 MIIM test look better. mohor 7442d 20h /ethmac/tags/rel_20
180 Bench outputs data to display every 128 bytes. mohor 7445d 16h /ethmac/tags/rel_20
179 Beautiful tests merget together mohor 7445d 17h /ethmac/tags/rel_20
178 Rearanged testcases mohor 7445d 17h /ethmac/tags/rel_20
177 Bug in MIIM fixed. mohor 7445d 21h /ethmac/tags/rel_20
176 lists changed to new directory structure mohor 7445d 22h /ethmac/tags/rel_20
175 Script fixed to new dir structure mohor 7445d 22h /ethmac/tags/rel_20
174 Directory keeper mohor 7445d 23h /ethmac/tags/rel_20
173 Keeps the directory mohor 7445d 23h /ethmac/tags/rel_20
172 NCSIM simulation environment added to cvs mohor 7445d 23h /ethmac/tags/rel_20
171 NCSIM simulation environment added. mohor 7445d 23h /ethmac/tags/rel_20
170 Headers changed. mohor 7445d 23h /ethmac/tags/rel_20
169 New testbench. Thanks to Tadej M - "The Spammer". mohor 7446d 00h /ethmac/tags/rel_20
168 CarrierSenseLost bug fixed when operating in full duplex mode. mohor 7446d 21h /ethmac/tags/rel_20
167 Sometimes both RxB_IRQ and RxE_IRQ were activated. Bug fixed. mohor 7447d 21h /ethmac/tags/rel_20
166 Reception is possible after RxPointer is read and not after BD is read. For
that reason RxBDReady is changed to RxReady.
Busy_IRQ interrupt connected. When there is no RxBD ready and frame
comes, interrupt is generated.
mohor 7448d 22h /ethmac/tags/rel_20
165 HASH improvement needed. mohor 7449d 01h /ethmac/tags/rel_20
164 Ethernet debug registers removed. mohor 7449d 01h /ethmac/tags/rel_20
163 Another temporary version. Core is almost finished. Testbench not included,
yet"
mohor 7449d 17h /ethmac/tags/rel_20
162 Another temporary version. Core is almost finished. Testbench not included,
yet.
mohor 7449d 17h /ethmac/tags/rel_20
161 Error acknowledge is generated when accessing BDs and RST bit in the
MODER register (r_Rst) is set.
mohor 7449d 23h /ethmac/tags/rel_20

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