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[/] [ethmac/] [tags/] [rel_21/] [sim/] - Rev 338


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Rev Log message Author Age Path
338 root 4084d 07h /ethmac/tags/rel_21/sim/
335 New directory structure. root 4141d 12h /ethmac/tags/rel_21/sim/
300 This commit was manufactured by cvs2svn to create tag 'rel_21'. 6169d 10h /ethmac/tags/rel_21/sim/
299 Artisan RAMs added. mohor 6169d 10h /ethmac/tags/rel_21/sim/
295 Few minor changes. tadejm 6176d 08h /ethmac/tags/rel_21/sim/
294 Added path to a file with distributed RAM instances for xilinx. tadejm 6178d 09h /ethmac/tags/rel_21/sim/
293 initial. tadejm 6202d 06h /ethmac/tags/rel_21/sim/
292 Corrected mistake. tadejm 6202d 06h /ethmac/tags/rel_21/sim/
291 initial tadejm 6202d 07h /ethmac/tags/rel_21/sim/
290 Additional checking for FAILED tests added - for ATS. tadejm 6202d 08h /ethmac/tags/rel_21/sim/
225 Some minor changes. tadejm 6475d 07h /ethmac/tags/rel_21/sim/
224 Signals for a wave window in Modelsim. tadejm 6475d 08h /ethmac/tags/rel_21/sim/
217 Bist supported. mohor 6482d 09h /ethmac/tags/rel_21/sim/
215 Bist supported. mohor 6482d 09h /ethmac/tags/rel_21/sim/
208 Virtual Silicon RAMs moved to lib directory tadej 6500d 03h /ethmac/tags/rel_21/sim/
207 Virtual Silicon RAM support fixed tadej 6500d 03h /ethmac/tags/rel_21/sim/
206 Virtual Silicon RAM added to the simulation. mohor 6500d 03h /ethmac/tags/rel_21/sim/
205 ETH_VIRTUAL_SILICON_RAM supported. mohor 6500d 04h /ethmac/tags/rel_21/sim/
187 _info file added. mohor 6506d 02h /ethmac/tags/rel_21/sim/
186 Macro for testbench (DO file). mohor 6506d 03h /ethmac/tags/rel_21/sim/

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