OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_22/] - Rev 81

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
81 Typos fixed, INT_SOURCE and INT_MASK registers changed. mohor 8062d 07h /ethmac/tags/rel_22/
80 Small fixes for external/internal DMA missmatches. mohor 8066d 09h /ethmac/tags/rel_22/
79 RetryCntLatched was unused and removed from design mohor 8066d 10h /ethmac/tags/rel_22/
78 WB_SEL_I was unused and removed from design mohor 8066d 10h /ethmac/tags/rel_22/
77 Interrupts changed mohor 8066d 10h /ethmac/tags/rel_22/
76 Interrupts changed in the top file mohor 8066d 10h /ethmac/tags/rel_22/
75 r_Bro is used for accepting/denying frames mohor 8066d 10h /ethmac/tags/rel_22/
74 Reset values are passed to registers through parameters mohor 8066d 10h /ethmac/tags/rel_22/
73 Number of interrupts changed mohor 8066d 10h /ethmac/tags/rel_22/
72 Retry is not activated when a Tx Underrun occured mohor 8070d 13h /ethmac/tags/rel_22/
71 Address recognition system added. Buffer Descriptors changed. DMA section
changed. Ports changed.
mohor 8074d 14h /ethmac/tags/rel_22/
70 Small fixes. mohor 8074d 15h /ethmac/tags/rel_22/
69 Define missmatch fixed. mohor 8075d 13h /ethmac/tags/rel_22/
68 Registered trimmed. Unused registers removed. mohor 8076d 12h /ethmac/tags/rel_22/
67 EXTERNAL_DMA used instead of WISHBONE_DMA. mohor 8076d 13h /ethmac/tags/rel_22/
66 Testbench fixed, code simplified, unused signals removed. mohor 8076d 19h /ethmac/tags/rel_22/
65 Testbench fixed, code simplified, unused signals removed. mohor 8076d 19h /ethmac/tags/rel_22/
64 Status was not written correctly when frames were discarted because of
address mismatch.
mohor 8077d 09h /ethmac/tags/rel_22/
63 RxAbort is connected differently. mohor 8077d 12h /ethmac/tags/rel_22/
62 RxAbort is an output. No need to have is declared as wire. mohor 8077d 12h /ethmac/tags/rel_22/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.