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Rev Log message Author Age Path
239 RxError is not generated when small frame reception is enabled and small
frames are received.		 tadejm 8106d 03h /ethmac/tags/rel_24/
238 Defines fixed to use generic RAM by default. mohor 8118d 07h /ethmac/tags/rel_24/
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 8120d 12h /ethmac/tags/rel_24/
235 rev 4. mohor 8121d 03h /ethmac/tags/rel_24/
234 Figure list assed to the revision 3. mohor 8121d 11h /ethmac/tags/rel_24/
233 Revision 0.3 released. Some figures added. mohor 8121d 11h /ethmac/tags/rel_24/
232 fpga define added. mohor 8126d 06h /ethmac/tags/rel_24/
231 Description of Core Modules added (figure). mohor 8128d 08h /ethmac/tags/rel_24/
229 case changed to casex. mohor 8132d 04h /ethmac/tags/rel_24/
227 Changed BIST scan signals. tadejm 8132d 08h /ethmac/tags/rel_24/
226 Igor added WB burst support and repaired BUG when handling TX under-run and retry. tadejm 8132d 09h /ethmac/tags/rel_24/
225 Some minor changes. tadejm 8132d 10h /ethmac/tags/rel_24/
224 Signals for a wave window in Modelsim. tadejm 8132d 11h /ethmac/tags/rel_24/
223 Some code changed due to bug fixes. tadejm 8132d 11h /ethmac/tags/rel_24/
221 TxStatus is written after last access to the TX fifo is finished (in case of abort
or retry). TxDone is fixed.		 mohor 8136d 09h /ethmac/tags/rel_24/
219 txfifo_cnt and rxfifo_cnt counters width is defined in the eth_define.v file,
TxDone and TxRetry are generated after the current WISHBONE access is
finished.		 mohor 8139d 10h /ethmac/tags/rel_24/
218 Typo error fixed. (When using Bist) mohor 8139d 12h /ethmac/tags/rel_24/
217 Bist supported. mohor 8139d 12h /ethmac/tags/rel_24/
216 Bist signals added. mohor 8139d 12h /ethmac/tags/rel_24/
215 Bist supported. mohor 8139d 12h /ethmac/tags/rel_24/
214 Signals for WISHBONE B3 compliant interface added. mohor 8140d 08h /ethmac/tags/rel_24/
213 Defines changed to have ETH_ prolog.
ETH_WISHBONE_B# define added.		 mohor 8140d 08h /ethmac/tags/rel_24/
212 Minor $display change. mohor 8140d 08h /ethmac/tags/rel_24/
211 Bist added. mohor 8140d 09h /ethmac/tags/rel_24/
210 BIST added. mohor 8140d 09h /ethmac/tags/rel_24/
209 Just back-up; not completed testbench and some testcases are not
wotking properly yet.		 tadejm 8141d 12h /ethmac/tags/rel_24/
208 Virtual Silicon RAMs moved to lib directory tadej 8157d 06h /ethmac/tags/rel_24/
207 Virtual Silicon RAM support fixed tadej 8157d 06h /ethmac/tags/rel_24/
206 Virtual Silicon RAM added to the simulation. mohor 8157d 06h /ethmac/tags/rel_24/
205 ETH_VIRTUAL_SILICON_RAM supported. mohor 8157d 07h /ethmac/tags/rel_24/

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