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[/] [ethmac/] [tags/] [rel_24/] [rtl/] - Rev 238

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Rev Log message Author Age Path
238 Defines fixed to use generic RAM by default. mohor 7338d 17h /ethmac/tags/rel_24/rtl/
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 7340d 23h /ethmac/tags/rel_24/rtl/
232 fpga define added. mohor 7346d 17h /ethmac/tags/rel_24/rtl/
229 case changed to casex. mohor 7352d 15h /ethmac/tags/rel_24/rtl/
227 Changed BIST scan signals. tadejm 7352d 19h /ethmac/tags/rel_24/rtl/
226 Igor added WB burst support and repaired BUG when handling TX under-run and retry. tadejm 7352d 20h /ethmac/tags/rel_24/rtl/
221 TxStatus is written after last access to the TX fifo is finished (in case of abort
or retry). TxDone is fixed.
mohor 7356d 20h /ethmac/tags/rel_24/rtl/
219 txfifo_cnt and rxfifo_cnt counters width is defined in the eth_define.v file,
TxDone and TxRetry are generated after the current WISHBONE access is
finished.
mohor 7359d 20h /ethmac/tags/rel_24/rtl/
218 Typo error fixed. (When using Bist) mohor 7359d 22h /ethmac/tags/rel_24/rtl/
214 Signals for WISHBONE B3 compliant interface added. mohor 7360d 19h /ethmac/tags/rel_24/rtl/
213 Defines changed to have ETH_ prolog.
ETH_WISHBONE_B# define added.
mohor 7360d 19h /ethmac/tags/rel_24/rtl/
212 Minor $display change. mohor 7360d 19h /ethmac/tags/rel_24/rtl/
211 Bist added. mohor 7360d 19h /ethmac/tags/rel_24/rtl/
210 BIST added. mohor 7360d 19h /ethmac/tags/rel_24/rtl/
204 ETH_VIRTUAL_SILICON_RAM supported (for ASIC implementation). mohor 7377d 17h /ethmac/tags/rel_24/rtl/
203 Virtual Silicon RAM might be used in the ASIC implementation of the ethernet
core.
mohor 7377d 17h /ethmac/tags/rel_24/rtl/
202 CsMiss added. When address between 0x800 and 0xfff is accessed within
Ethernet Core, error acknowledge is generated.
mohor 7380d 18h /ethmac/tags/rel_24/rtl/
168 CarrierSenseLost bug fixed when operating in full duplex mode. mohor 7388d 21h /ethmac/tags/rel_24/rtl/
167 Sometimes both RxB_IRQ and RxE_IRQ were activated. Bug fixed. mohor 7389d 21h /ethmac/tags/rel_24/rtl/
166 Reception is possible after RxPointer is read and not after BD is read. For
that reason RxBDReady is changed to RxReady.
Busy_IRQ interrupt connected. When there is no RxBD ready and frame
comes, interrupt is generated.
mohor 7390d 22h /ethmac/tags/rel_24/rtl/

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