OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_24/] [rtl/] - Rev 270

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
232 fpga define added. mohor 7280d 21h /ethmac/tags/rel_24/rtl/
229 case changed to casex. mohor 7286d 19h /ethmac/tags/rel_24/rtl/
227 Changed BIST scan signals. tadejm 7286d 23h /ethmac/tags/rel_24/rtl/
226 Igor added WB burst support and repaired BUG when handling TX under-run and retry. tadejm 7287d 01h /ethmac/tags/rel_24/rtl/
221 TxStatus is written after last access to the TX fifo is finished (in case of abort
or retry). TxDone is fixed.
mohor 7291d 00h /ethmac/tags/rel_24/rtl/
219 txfifo_cnt and rxfifo_cnt counters width is defined in the eth_define.v file,
TxDone and TxRetry are generated after the current WISHBONE access is
finished.
mohor 7294d 01h /ethmac/tags/rel_24/rtl/
218 Typo error fixed. (When using Bist) mohor 7294d 03h /ethmac/tags/rel_24/rtl/
214 Signals for WISHBONE B3 compliant interface added. mohor 7294d 23h /ethmac/tags/rel_24/rtl/
213 Defines changed to have ETH_ prolog.
ETH_WISHBONE_B# define added.
mohor 7295d 00h /ethmac/tags/rel_24/rtl/
212 Minor $display change. mohor 7295d 00h /ethmac/tags/rel_24/rtl/

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2022 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.